Обновление

Inc/PwmFlagchip.h

@@ -0,0 +1,25 @@
+//
+// Created by cfif on 17.11.22.
+//
+
+#ifndef PWM_FLAGCHIP_H
+#define PWM_FLAGCHIP_H
+
+#include "PwmIO.h"
+#include "cmsis_os2.h"
+#include "fc7xxx_driver_tpu.h"
+#include "interrupt_manager.h"
+
+typedef struct {
+
+    TPU_InterruptCfgType etpu_Int_config_tbl;
+    TPU_PwmCfgType etpu_pwmconfig_tbl;
+
+    uint8_t TPU_PWM_CHANNEL;
+
+} tPwmFlagchip;
+
+
+tPwmIO vPwmGetIo(tPwmFlagchip *env);
+
+#endif //PWM_FLAGCHIP_H

Src/PwmFlagchip.c

@@ -0,0 +1,82 @@
+//
+// Created by cfif on 07.09.22.
+//
+#include <SystemDelayInterface.h>
+#include "PwmFlagchip.h"
+
+void Set_Tpu_PwmCallback(tPwmFlagchip *env) {
+    TPU_PwmServiceReq(env->TPU_PWM_CHANNEL, env->etpu_pwmconfig_tbl.u32ActiveTime,
+                      env->etpu_pwmconfig_tbl.u32PeriodTime);
+}
+
+tPwmFlagchip PWM_Initial(
+        uint32_t PeriodTime,
+        uint32_t ActiveTime,
+        uint8_t TPU_PWM_CHANNEL,
+        uint8 TPU0_CH_PRIORITY,
+        TPU_EventCallbackType Bsp_Tpu_PwmCallback,
+        TPU_TCR1OverflowCallbackType Bsp_Tpu_OverflowCallBack) {
+
+
+    tPwmFlagchip pwm = {
+
+            .etpu_pwmconfig_tbl = {
+                    .eTBS1 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1,
+                    .eTBS2 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1,
+                    .bPwmUseTCR1 = (bool) true,
+                    .bPwmUseTCR2 = (bool) false,
+                    .u32ActiveTime = ActiveTime,
+                    .u32PeriodTime = PeriodTime,
+                    .bActiveHigh = (bool) true
+            },
+
+            .etpu_Int_config_tbl =                    {
+                    .bEventIntEn = (bool) true,
+                    .bTCR1OverFlowEventIntEn = (bool) true,
+                    .bTCR2OverFlowEventIntEn = (bool) false,
+                    .pEventNotify = Bsp_Tpu_PwmCallback,
+                    .pHSANotify = NULL,
+                    .pTCR1OverflowNotify = Bsp_Tpu_OverflowCallBack,
+                    .pTCR2OverflowNotify = NULL,
+                    .eChTrigType = TPUH_ANY_EVENT_GATED_BY_MSRTSR
+            },
+
+            .TPU_PWM_CHANNEL = TPU_PWM_CHANNEL
+
+
+    };
+
+    TPU_DeInit();
+    TPU_Init();
+    TPU_PwmModeInit(TPU_PWM_CHANNEL, &pwm.etpu_pwmconfig_tbl);
+    TPU_InitChannelInterrupt(TPU_PWM_CHANNEL, &pwm.etpu_Int_config_tbl);
+
+    NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUP_4);
+
+    if (TPU_PWM_CHANNEL <= 7) {
+        NVIC_EnableIRQ(TPU0_CH0_7_IRQn);
+        NVIC_SetPriority(TPU0_CH0_7_IRQn, TPU0_CH_PRIORITY);
+    } else if (TPU_PWM_CHANNEL <= 15) {
+        NVIC_EnableIRQ(TPU0_CH8_15_IRQn);
+        NVIC_SetPriority(TPU0_CH8_15_IRQn, TPU0_CH_PRIORITY);
+    } else if (TPU_PWM_CHANNEL <= 23) {
+        NVIC_EnableIRQ(TPU0_CH16_23_IRQn);
+        NVIC_SetPriority(TPU0_CH16_23_IRQn, TPU0_CH_PRIORITY);
+    } else if (TPU_PWM_CHANNEL <= 31) {
+        NVIC_EnableIRQ(TPU0_CH24_31_IRQn);
+        NVIC_SetPriority(TPU0_CH24_31_IRQn, TPU0_CH_PRIORITY);
+    }
+    return pwm;
+}
+
+static void vPwmRun(tPwmFlagchip *env) {
+    TPU_StartChannel();
+}
+
+tPwmIO vPwmGetIo(tPwmFlagchip *env) {
+    tPwmIO io = {
+            .env = env,
+            .run = (PwmIOTransaction) vPwmRun,
+    };
+    return io;
+}

modular.json

@@ -0,0 +1,10 @@
+{
+  "cmake": {
+    "inc_dirs": [
+      "Inc"
+    ],
+    "srcs": [
+      "Src/**.c"
+    ]
+  }
+}