Init SubModules

This commit is contained in:
Степанов Станислав 2025-09-25 15:57:47 +03:00
commit 61e8faba80
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[submodule "MODULES/SerialPort"]
path = MODULES/SerialPort
url = git@gitea.ficom-it.info:ELEMENT/SerialPort
[submodule "MODULES/SerialPortInterface"]
path = MODULES/SerialPortInterface
url = git@gitea.ficom-it.info:ELEMENT/SerialPortInterface
[submodule "MODULES/SystemDelayInterface"]
path = MODULES/SystemDelayInterface
url = git@gitea.ficom-it.info:ELEMENT/SystemDelayInterface
[submodule "MODULES/AsciiStringAssemblingUtils"]
path = MODULES/AsciiStringAssemblingUtils
url = git@gitea.ficom-it.info:ELEMENT/AsciiStringAssemblingUtils
[submodule "MODULES/AsciiStringParsingUtils"]
path = MODULES/AsciiStringParsingUtils
url = git@gitea.ficom-it.info:ELEMENT/AsciiStringParsingUtils
[submodule "MODULES/SystemSyncInterface"]
path = MODULES/SystemSyncInterface
url = git@gitea.ficom-it.info:ELEMENT/SystemSyncInterface
[submodule "MODULES/CmakeConfig_GCC_CortexM4"]
path = MODULES/CmakeConfig_GCC_CortexM4
url = git@gitea.ficom-it.info:ELEMENT/CmakeConfig_GCC_CortexM4
[submodule "MODULES/FreeRTOSHeap4_CM4_CMSIS"]
path = MODULES/FreeRTOSHeap4_CM4_CMSIS
url = git@gitea.ficom-it.info:ELEMENT/FreeRTOSHeap4_CM4_CMSIS
[submodule "MODULES/FreeRTOS"]
path = MODULES/FreeRTOS
url = git@gitea.ficom-it.info:ELEMENT/FreeRTOS
[submodule "MODULES/FreeRTOSHeap4"]
path = MODULES/FreeRTOSHeap4
url = git@gitea.ficom-it.info:ELEMENT/FreeRTOSHeap4
[submodule "MODULES/FreeRTOSPortable_GCC_CM4"]
path = MODULES/FreeRTOSPortable_GCC_CM4
url = git@gitea.ficom-it.info:ELEMENT/FreeRTOSPortable_GCC_CM4
[submodule "MODULES/FreeRTOSCmsis"]
path = MODULES/FreeRTOSCmsis
url = git@gitea.ficom-it.info:ELEMENT/FreeRTOSCmsis
[submodule "MODULES/CmsisRtosInterface"]
path = MODULES/CmsisRtosInterface
url = git@gitea.ficom-it.info:ELEMENT/CmsisRtosInterface
[submodule "MODULES/SystemDelay_CMSIS_RTOS"]
path = MODULES/SystemDelay_CMSIS_RTOS
url = git@gitea.ficom-it.info:ELEMENT/SystemDelay_CMSIS_RTOS
[submodule "MODULES/DeviceStartup_ARTERY_AT32F403A_407"]
path = MODULES/DeviceStartup_ARTERY_AT32F403A_407
url = git@gitea.ficom-it.info:ELEMENT/DeviceStartup_ARTERY_AT32F403A_407
[submodule "MODULES/PeripheralDriver_ARTERY_AT32F403A_407"]
path = MODULES/PeripheralDriver_ARTERY_AT32F403A_407
url = git@gitea.ficom-it.info:ELEMENT/PeripheralDriver_ARTERY_AT32F403A_407
[submodule "MODULES/CmsisRtosThreadUtils"]
path = MODULES/CmsisRtosThreadUtils
url = git@gitea.ficom-it.info:ELEMENT/CmsisRtosThreadUtils
[submodule "MODULES/SerialPort_ARTERY_AT32_F403A"]
path = MODULES/SerialPort_ARTERY_AT32_F403A
url = git@gitea.ficom-it.info:ELEMENT/SerialPort_ARTERY_AT32_F403A
[submodule "MODULES/CmsisCore5"]
path = MODULES/CmsisCore5
url = git@gitea.ficom-it.info:ELEMENT/CmsisCore5
[submodule "MODULES/GpioPin_ARTERY_AT32F435_437"]
path = MODULES/GpioPin_ARTERY_AT32F435_437
url = git@gitea.ficom-it.info:ELEMENT/GpioPin_ARTERY_AT32F435_437
[submodule "MODULES/GpioPinInterface"]
path = MODULES/GpioPinInterface
url = git@gitea.ficom-it.info:ELEMENT/GpioPinInterface
[submodule "MODULES/SerialPort_P2P_CmsisRtos"]
path = MODULES/SerialPort_P2P_CmsisRtos
url = git@gitea.ficom-it.info:ELEMENT/SerialPort_P2P_CmsisRtos
[submodule "MODULES/FirmwareMetadataSection"]
path = MODULES/FirmwareMetadataSection
url = git@gitea.ficom-it.info:ELEMENT/FirmwareMetadataSection
[submodule "MODULES/CmakeConfig_RandomBuildIdGenerator"]
path = MODULES/CmakeConfig_RandomBuildIdGenerator
url = git@gitea.ficom-it.info:ELEMENT/CmakeConfig_RandomBuildIdGenerator
[submodule "MODULES/LoggerToSerialPort"]
path = MODULES/LoggerToSerialPort
url = git@gitea.ficom-it.info:ELEMENT/LoggerToSerialPort
[submodule "MODULES/RtcInterface"]
path = MODULES/RtcInterface
url = git@gitea.ficom-it.info:ELEMENT/RtcInterface
[submodule "MODULES/Rtc"]
path = MODULES/Rtc
url = git@gitea.ficom-it.info:ELEMENT/Rtc
[submodule "MODULES/LoggerInterface"]
path = MODULES/LoggerInterface
url = git@gitea.ficom-it.info:ELEMENT/LoggerInterface
[submodule "MODULES/BaseTypes"]
path = MODULES/BaseTypes
url = git@gitea.ficom-it.info:ELEMENT/BaseTypes
[submodule "MODULES/SerialPortHalfDuplexInterface"]
path = MODULES/SerialPortHalfDuplexInterface
url = git@gitea.ficom-it.info:ELEMENT/SerialPortHalfDuplexInterface
[submodule "MODULES/StorageOnFlash_ARTERY_AT32"]
path = MODULES/StorageOnFlash_ARTERY_AT32
url = git@gitea.ficom-it.info:ELEMENT/StorageOnFlash_ARTERY_AT32
[submodule "MODULES/StorageInterface"]
path = MODULES/StorageInterface
url = git@gitea.ficom-it.info:ELEMENT/StorageInterface
[submodule "MODULES/InternalFlashPage_ARTERY_AT32"]
path = MODULES/InternalFlashPage_ARTERY_AT32
url = git@gitea.ficom-it.info:ELEMENT/InternalFlashPage_ARTERY_AT32
[submodule "MODULES/SpiPortInterface"]
path = MODULES/SpiPortInterface
url = git@gitea.ficom-it.info:ELEMENT/SpiPortInterface
[submodule "MODULES/SpiPort"]
path = MODULES/SpiPort
url = git@gitea.ficom-it.info:ELEMENT/SpiPort
[submodule "MODULES/SpiPort_ARTERY_AT32_F403A"]
path = MODULES/SpiPort_ARTERY_AT32_F403A
url = git@gitea.ficom-it.info:ELEMENT/SpiPort_ARTERY_AT32_F403A
[submodule "MODULES/Adc_ARTERY_AT32"]
path = MODULES/Adc_ARTERY_AT32
url = git@gitea.ficom-it.info:ELEMENT/Adc_ARTERY_AT32
[submodule "MODULES/Adc"]
path = MODULES/Adc
url = git@gitea.ficom-it.info:ELEMENT/Adc
[submodule "MODULES/AdcInterface"]
path = MODULES/AdcInterface
url = git@gitea.ficom-it.info:ELEMENT/AdcInterface
[submodule "MODULES/VarTabDumpObserver"]
path = MODULES/VarTabDumpObserver
url = git@gitea.ficom-it.info:ELEMENT/VarTabDumpObserver
[submodule "MODULES/VariablesTable"]
path = MODULES/VariablesTable
url = git@gitea.ficom-it.info:ELEMENT/VariablesTable
[submodule "MODULES/VersionsInfoTable"]
path = MODULES/VersionsInfoTable
url = git@gitea.ficom-it.info:ELEMENT/VersionsInfoTable

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MODULES/Adc Submodule

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Subproject commit 7fea30a43caca9cc87e7031519ba289bdfab5451

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MODULES/AdcInterface Submodule

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Subproject commit e3ef349536fa27e4e42f8ea442bb9ec674604a5b

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Subproject commit 708c3f1114421844f706916ce1b15190e112575b

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Subproject commit 20a37e62c5a7729bd70320a1ca44ce596dd0b4e1

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Subproject commit a25e1627af81e69cce7e967e693a05a097a26c46

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MODULES/BaseTypes Submodule

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Subproject commit eeeab595e601f80dd5ccfc78d509fd720f5bd928

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Subproject commit 2248f615174175ac99e0cfb92233d5b3e5bbf142

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MODULES/CmsisCore5 Submodule

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Subproject commit 4165b80390e50d3b971b35361c5e16e27e88d7aa

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Subproject commit 308bd805612cda776718aeb97a2455c6c10760e8

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Subproject commit e937039d2b62be26bd827bbb3f59da2ad9723c7e

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MODULES/FreeRTOS Submodule

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Subproject commit 78e73e1f9967b5e30698b2ca963824a0025e4352

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MODULES/FreeRTOSCmsis Submodule

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Subproject commit 68470c98040b6e435385f4616be80f360e38165b

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MODULES/FreeRTOSHeap4 Submodule

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Subproject commit 194e70bf5c9f8cb1bc5fb08983af4615ac0bbbae

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Subproject commit 372907eed0b2db01784a61d997e47572fbe0ded8

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MODULES/Rtc Submodule

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Subproject commit 1370d5dbc426e39846298aa4b480df792c38c88f

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MODULES/RtcInterface Submodule

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Subproject commit 06b8cadf667e5342af061b9f0537c7811de0f873

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MODULES/SerialPort Submodule

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Subproject commit bdf4a4fe2f97eeb64537ead536c062dd7398ca88

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Subproject commit 843841cbdd55063112dfd77ab1ebb48ca0cd02ab

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MODULES/SpiPort Submodule

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Subproject commit c3cf40839483a4ccd2238207cecba74d8c0231c2

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