58 lines
1.4 KiB
INI
58 lines
1.4 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Setup register
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#
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# ncs_read_setup
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# nrd_setup
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# ncs_write_setup
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# set nwe_setup
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#
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#
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# Pulse register
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#
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# ncs_read_pulse
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# nrd_pulse
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# ncs_write_pulse
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# nwe_pulse
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#
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#
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# Cycle register
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#
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# read_cycle 0
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# write_cycle 0
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#
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#
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# Mode register
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#
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# mode
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# tdf_cycles
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proc sam9_smc_config { cs smc_config } {
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;# Setup Register for CS n
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set AT91_SMC_SETUP [expr {$::AT91_SMC + 0x00 + $cs * 0x10}]
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set val [expr {$smc_config(nwe_setup) << 0}]
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set val [expr {$val | $smc_config(ncs_write_setup) << 8}]
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set val [expr {$val | $smc_config(nrd_setup)) << 16}]
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set val [expr {$val | $smc_config(ncs_read_setup) << 24}]
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mww $AT91_SMC_SETUP $val
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;# Pulse Register for CS n
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set AT91_SMC_PULSE [expr {$::AT91_SMC + 0x04 + $cs * 0x10}]
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set val [expr {$smc_config(nwe_pulse) << 0}]
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set val [expr {$val | $smc_config(ncs_write_pulse) << 8}]
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set val [expr {$val | $smc_config(nrd_pulse) << 16}]
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set val [expr {$val | $smc_config(ncs_read_pulse) << 24}]
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mww $AT91_SMC_PULSE $val
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;# Cycle Register for CS n
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set AT91_SMC_CYCLE [expr {$::AT91_SMC + 0x08 + $cs * 0x10}]
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set val [expr {$smc_config(write_cycle) << 0}]
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set val [expr {$val | $smc_config(read_cycle) << 16}]
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mww $AT91_SMC_CYCLE $val
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;# Mode Register for CS n
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set AT91_SMC_MODE [expr {$::AT91_SMC + 0x0c + $cs * 0x10}]
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set val [expr {$smc_config(mode) << 0}]
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set val [expr {$val | $smc_config(tdf_cycles) << 16}]
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mww $AT91_SMC_MODE $val
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}
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