# SPDX-License-Identifier: GPL-2.0-or-later

# Sayma AMC is an FPGA board for the µTCA AMC format
# The board is open hardware (CERN OHL) and the gateware and software
# running on it are open source (ARTIQ, LGPLv3+).
#
# https://github.com/m-labs/sinara/wiki/Sayma
#
# It contains a Xilinx Kintex Ultrascale 040 FPGA (xcku040).
# There is a SCANSTA112SM JTAG router on the board which is configured to
# automatically add devices to the JTAG svcan chain when they are added.
# Sayma AMC is usually combined with Sayma RTM (rear transition module)
# which features an Artix 7 FPGA.

adapter driver ftdi
ftdi device_desc "Quad RS232-HS"
ftdi vid_pid 0x0403 0x6011
ftdi channel 0
# Use this to distinguish multiple boards by topology
#adapter usb location 5:1
# sampling on falling edge generally seems to work and accelerates things but
# is not fully tested
#ftdi tdo_sample_edge falling
# EN_USB_JTAG on ADBUS7: out, high
# USB_nTRST on ADBUS4: out, high, but R46 is DNP
ftdi layout_init 0x0098 0x008b
#ftdi layout_signal EN_USB -data 0x0080
#ftdi layout_signal nTRST -data 0x0010
reset_config none

adapter speed 5000

transport select jtag

# Add the RTM Artix to the chain. Note that this changes the PLD numbering.
# Unfortunately openocd TAPs can't be disabled after they have been added and
# before `init`.
#source [find cpld/xilinx-xc7.cfg]

set CHIP XCKU040
source [find cpld/xilinx-xcu.cfg]

set XILINX_USER1 0x02
set XILINX_USER2 0x03
set JTAGSPI_IR $XILINX_USER1
source [find cpld/jtagspi.cfg]
flash bank xcu.spi1 jtagspi 0 0 0 0 xcu.proxy $XILINX_USER2
