source [find target/swj-dp.tcl]
source [find mem_helper.tcl]

# increase working area
set WORKAREASIZE 0x1000

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME at32f437xx
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

# Work-area is a space in RAM used for flash programming
# By default use 64kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x1000
}

#jtag scan chain
if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   if { [using_jtag] } {
      set _CPUTAPID 0x4ba00477
   } else {
      set _CPUTAPID 0x2ba01477
   }
}

# Allow overriding the Flash bank size
if { [info exists FLASH_SIZE] } {
    set _FLASH_SIZE $FLASH_SIZE
} else {
    # autodetect size
    set _FLASH_SIZE 0
}


swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.bank1
flash bank $_FLASHNAME $_CHIPNAME 0x08000000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.bank2
flash bank $_FLASHNAME $_CHIPNAME 0x08200000 0 0 0 $_TARGETNAME
# enable at32 qspi1
set QSPI1 1

# enable at32 qspi2
# set QSPI2 1

if { [info exists QSPI1] && $QSPI1 } {
	set _QSPINAME $_CHIPNAME.qspi1
	flash bank $_QSPINAME at32qspi 0x90000000 0 0 0 $_TARGETNAME 0xA0001000
}

if { [info exists QSPI2] && $QSPI2 } {
	set _QSPINAME $_CHIPNAME.qspi2
	flash bank $_QSPINAME at32qspi 0xB0000000 0 0 0 $_TARGETNAME 0xA0002000
}


# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter speed 5000

adapter srst delay 100

reset_config srst_nogate

if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset
     cortex_m reset_config sysresetreq
}

$_TARGETNAME configure -event examine-end {
	# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
	#              DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000307 0
}

$_TARGETNAME configure -event trace-config {
	# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
	# change this value accordingly to configure trace pins
	# assignment
	mmw 0xE0042004 0x00000020 0
}

$_TARGETNAME configure -event reset-init {
	mww 0x400238A0 0x000F5000
	mww 0x40023C60 0x00000000
	sleep 1
	qspi1_init
#	qspi2_init
}

$_TARGETNAME configure -event halted { qspi1_init }

# QSPI1 initialization GPIOA 0x40020000, GPIOB 0x40020400, GPIOC 0x40020800 GPIOD 0x40020C00, GPIOE 0x40021000, GPIOF 0x40021400, GPIOG 0x40021800 GPIOH 0x40021C00
proc qspi1_init { } {
	global a
	mww 0x400238A0 0x000F5000
	mww 0x40023C60 0x00000000
	
	#Enable GPIO AHB Clock 
	mmw 0x40023830 0x000000FF 0 ;# CRM->AHBEN1 |= GPIOA-GPIOH (enable clocks)
	mmw 0x40023838 0x00000402 0 ;# Enable QSPI1 and QSPI2 Clock
	
###################Select QSPI1 GPIO IO0, IO1, IO2, IO3, SCK, CS##############################
	# set QSPI1_IO0_PA6 1 ;#PA6
	# set QSPI1_IO0_PB0 1 ;#PB0
	# set QSPI1_IO0_PB11 1 ;#PB11
	# set QSPI1_IO0_PC9 1 ;#PC9
	# set QSPI1_IO0_PD11 1 ;#PD11
	set QSPI1_IO0_PF8 1    ;#PF8
	# set QSPI1_IO0_PH2 1 ;#PH2
	
	# set QSPI1_IO1_PA7 1 ;#PA7
	# set QSPI1_IO1_PB10 1 ;#PB10
	# set QSPI1_IO1_PC10 1 ;#PC10
	# set QSPI1_IO1_PD12 1 ;#PD12
	  set QSPI1_IO1_PF9 1 ;#PF9
	# set QSPI1_IO1_PH3 1 ;#PH3
	
	# set QSPI1_IO2_PA15 1 ;#PA15
	# set QSPI1_IO2_PC4  1 ;#PC4
	# set QSPI1_IO2_PC8 1 ;#PC8
	# set QSPI1_IO2_PE2 1 ;#PE2
	  set QSPI1_IO2_PF7 1 ;#PF7
	# set QSPI1_IO2_PG9 1 ;#PG9
	
	# set QSPI1_IO3_PA1 1 ;#PA1
	# set QSPI1_IO3_PB3  1 ;#PB3
	# set QSPI1_IO3_PC5 1 ;#PC5
	# set QSPI1_IO3_PD13 1 ;#PD13
	  set QSPI1_IO3_PF6 1 ;#PF6
	# set QSPI1_IO3_PG14 1 ;#PG14
	
	# set QSPI1_SCK_PB1 1 ;#PB1
	# set QSPI1_SCK_PB2  1 ;#PB2
	# set QSPI1_SCK_PD3 1 ;#PD3
	  set QSPI1_SCK_PF10 1 ;#PF10
	  
	# set QSPI1_CS_PB6 1 ;#PB6
	# set QSPI1_CS_PB9  1 ;#PB9
	# set QSPI1_CS_PB10 1 ;#PB10
	# set QSPI1_CS_PC11 1 ;#PC11
	  set QSPI1_CS_PG6 1 ;#PG6
	
	
##############################QSPI1_IO0###############################	
	# QSPI_IO0: PA6, PB0, PB11, PC9, PD11, PF8, PH2
	if { [info exists QSPI1_IO0_PA6] && $QSPI1_IO0_PA6 } {	
		mmw 0x40020000 0x00002000 0
		mmw 0x40020008 0x00001000 0
		mmw 0x40020020 0x0A000000 0
	}
	
	if { [info exists QSPI1_IO0_PB0] && $QSPI1_IO0_PB0 } {	
		mmw 0x40020400 0x00000002 0
		mmw 0x40020408 0x00000001 0
		mmw 0x40020420 0x0000000A 0
	}
	
	if { [info exists QSPI1_IO0_PB11] && $QSPI1_IO0_PB11 } {	
		mmw 0x40020400 0x00800000 0
		mmw 0x40020408 0x00400000 0
		mmw 0x40020424 0x0000A000 0
	}
	
	if { [info exists QSPI1_IO0_PC9] && $QSPI1_IO0_PC9 } {	
		mmw 0x40020800 0x00080000 0
		mmw 0x40020808 0x00040000 0
		mmw 0x40020824 0x00000090 0
	}
	
	if { [info exists QSPI1_IO0_PD11] && $QSPI1_IO0_PD11 } {	
		mmw 0x40020C00 0x00800000 0
		mmw 0x40020C08 0x00400000 0
		mmw 0x40020C24 0x0000A000 0
	}
	
	if { [info exists QSPI1_IO0_PF8] && $QSPI1_IO0_PF8 } {	
		mmw 0x40021400 0x00020000 0
		mmw 0x40021408 0x00010000 0
		mmw 0x40021424 0x0000000A 0
	}
	
	if { [info exists QSPI1_IO0_PH2] && $QSPI1_IO0_PH2 } {	
		mmw 0x40021C00 0x00000020 0
		mmw 0x40021C08 0x00000010 0
		mmw 0x40021C20 0x00000A00 0
	}
	
##############################QSPI1_IO1###############################	
	#QSPI_IO1: PA7, PB10, PC10, PD12, PF9, PH3
	
	if { [info exists QSPI1_IO1_PA7] && $QSPI1_IO1_PA7 } {	
		mmw 0x40020000 0x00008000 0
		mmw 0x40020008 0x00004000 0
		mmw 0x40020020 0xA0000000 0
	}
	
	if { [info exists QSPI1_IO1_PB10] && $QSPI1_IO1_PB10 } {	
		mmw 0x40020400 0x00200000 0
		mmw 0x40020408 0x00100000 0
		mmw 0x40020424 0x00000A00 0
	}
	
	if { [info exists QSPI1_IO1_PC10] && $QSPI1_IO1_PC10 } {	
		mmw 0x40020800 0x00200000 0
		mmw 0x40020808 0x00100000 0
		mmw 0x40020824 0x00000A00 0
	}
	
	if { [info exists QSPI1_IO1_PD12] && $QSPI1_IO1_PD12 } {	
		mmw 0x40020C00 0x02000000 0
		mmw 0x40020C08 0x01000000 0
		mmw 0x40020C24 0x00090000 0
	}
	
	if { [info exists QSPI1_IO1_PF9] && $QSPI1_IO1_PF9 } {	
		mmw 0x40021400 0x00080000 0
		mmw 0x40021408 0x00040000 0
		mmw 0x40021424 0x000000A0 0
	}
	
	if { [info exists QSPI1_IO0_PH3] && $QSPI1_IO0_PH3 } {	
		mmw 0x40021C00 0x00000080 0
		mmw 0x40021C08 0x00000040 0
		mmw 0x40021C20 0x0000A000 0
	}
	
##############################QSPI1_IO2###############################		
	#QSPI_IO2: PA15, PC4, PC8, PE2, PF7, PG9
	
	if { [info exists QSPI1_IO2_PA15] && $QSPI1_IO2_PA15 } {	
	
		mmw 0x40020000 0x80000000 0
		mmw 0x40020008 0x40000000 0
		mmw 0x40020024 0xA0000000 0
	}
	
	if { [info exists QSPI1_IO2_PC4] && $QSPI1_IO2_PC4 } {	
	
		mmw 0x40020800 0x00000200 0
		mmw 0x40020808 0x00000100 0
		mmw 0x40020820 0x000A0000 0
	}
	
	if { [info exists QSPI1_IO2_PC8] && $QSPI1_IO2_PC8 } {	
	
		mmw 0x40020800 0x00020000 0
		mmw 0x40020808 0x00010000 0
		mmw 0x40020824 0x00000009 0
	}
	
	if { [info exists QSPI1_IO2_PE2] && $QSPI1_IO2_PE2 } {	
	
		mmw 0x40021000 0x00000020 0
		mmw 0x40021008 0x00000010 0
		mmw 0x40021020 0x00000900 0
	}
	
	if { [info exists QSPI1_IO2_PF7] && $QSPI1_IO2_PF7 } {	
	
		mmw 0x40021400 0x00008000 0
		mmw 0x40021408 0x00004000 0
		mmw 0x40021420 0x90000000 0
	}
	
	if { [info exists QSPI1_IO2_PG9] && $QSPI1_IO2_PG9 } {	
		mmw 0x40021800 0x00080000 0
		mmw 0x40021808 0x00040000 0
		mmw 0x40021824 0x00000090 0
	}
	
##############################QSPI1_IO3###############################		
	#QSPI_IO3: PA1, PB3, PC5, PD13, PF6, PG14
	
	if { [info exists QSPI1_IO3_PA1] && $QSPI1_IO3_PA1 } {	
		mmw 0x40020000 0x00000008 0
		mmw 0x40020008 0x00000004 0
		mmw 0x40020020 0x00000090 0
	}
	
	if { [info exists QSPI1_IO3_PB3] && $QSPI1_IO3_PB3 } {	
		mmw 0x40020400 0x00000080 0
		mmw 0x40020408 0x00000040 0
		mmw 0x40020420 0x0000A000 0
	}
	
	if { [info exists QSPI1_IO3_PC5] && $QSPI1_IO3_PC5 } {	
	
		mmw 0x40020800 0x00000800 0
		mmw 0x40020808 0x00000400 0
		mmw 0x40020820 0x00a00000 0
	}
	
	if { [info exists QSPI1_IO3_PD13] && $QSPI1_IO3_PD13 } {	
		mmw 0x40020C00 0x08000000 0
		mmw 0x40020C08 0x04000000 0
		mmw 0x40020C24 0x00900000 0
	}
	
	if { [info exists QSPI1_IO3_PF6] && $QSPI1_IO3_PF6 } {	
		mmw 0x40021400 0x00002000 0
		mmw 0x40021408 0x00001000 0
		mmw 0x40021420 0x09000000 0
	}
	
	if { [info exists QSPI1_IO3_PG14] && $QSPI1_IO3_PG14 } {	
		mmw 0x40021800 0x20000000 0
		mmw 0x40021808 0x10000000 0
		mmw 0x40021824 0x09000000 0
	}
	
##############################QSPI1_SCK###############################		
	#QSPI_SCK: PB1, PB2, PD3, PF10
	
	if { [info exists QSPI1_SCK_PB1] && $QSPI1_SCK_PB1 } {	
		mmw 0x40020400 0x00000008 0
		mmw 0x40020408 0x00000004 0
		mmw 0x40020420 0x00000090 0
	}
	
	if { [info exists QSPI1_SCK_PB2] && $QSPI1_SCK_PB2 } {	
		mmw 0x40020400 0x00000020 0
		mmw 0x40020408 0x00000010 0
		mmw 0x40020420 0x00000900 0
	}
	
	if { [info exists QSPI1_SCK_PD3] && $QSPI1_SCK_PD3 } {	
		mmw 0x40020C00 0x00000080 0
		mmw 0x40020C08 0x00000040 0
		mmw 0x40020C20 0x0000A000 0
	}
	
	if { [info exists QSPI1_SCK_PF10] && $QSPI1_SCK_PF10 } {	
		mmw 0x40021400 0x00200000 0
		mmw 0x40021408 0x00100000 0
		mmw 0x40021424 0x00000900 0
	}
	
##############################QSPI1_CS###############################		
	#QSPI_CS: PB6, PB9, PB10, PC11, PG6
	
	if { [info exists QSPI1_CS_PB6] && $QSPI1_CS_PB6 } {	
		mmw 0x40020400 0x00002000 0
		mmw 0x40020408 0x00001000 0
		mmw 0x40020420 0x0A000000 0
	}
	
	if { [info exists QSPI1_CS_PB9] && $QSPI1_CS_PB9 } {	
		mmw 0x40020400 0x00080000 0
		mmw 0x40020408 0x00040000 0
		mmw 0x40020424 0x000000A0 0
	}
	
	if { [info exists QSPI1_CS_PB10] && $QSPI1_CS_PB10 } {	
		mmw 0x40020400 0x00200000 0
		mmw 0x40020408 0x00100000 0
		mmw 0x40020424 0x00000900 0
	}
	
	if { [info exists QSPI1_CS_PC11] && $QSPI1_CS_PC11 } {	
		mmw 0x40020800 0x00800000 0
		mmw 0x40020808 0x00400000 0
		mmw 0x40020824 0x00009000 0
	}
	
	if { [info exists QSPI1_CS_PG6] && $QSPI1_CS_PG6 } {	
		mmw 0x40021800 0x00002000 0
		mmw 0x40021808 0x00001000 0
		mmw 0x40021820 0x0A000000 0
	}
}	

proc qspi2_init { } {
	global a
	
	#Enable GPIO AHB Clock 
	mmw 0x40023830 0x000000FF 0 ;# CRM->AHBEN1 |= GPIOA-GPIOH (enable clocks)
	mmw 0x40023838 0x00000402 0 ;# Enable QSPI2 and QSPI2 Clock
	
###################Select QSPI2 GPIO IO0, IO1, IO2, IO3, SCK, CS##############################
	# set QSPI2_IO0_PB0 1 ;#PB0
	# set QSPI2_IO0_PE7 1 ;#PE7
	 set QSPI2_IO0_PG14 1 ;#PG14
	
	# set QSPI2_IO1_PA15 1 ;#PA15
	# set QSPI2_IO1_PB7 1 ;#PB7
	# set QSPI2_IO1_PC3 1 ;#PC3
	# set QSPI2_IO1_PE8 1 ;#PE8
	  set QSPI2_IO1_PG12 1 ;#PG12
	
	# set QSPI2_IO2_PA5 1 ;#PA5
	# set QSPI2_IO2_PE9  1 ;#PE9
	# set QSPI2_IO2_PG10 1 ;#PG10
	
	# set QSPI2_IO3_PA3 1 ;#PA3
	# set QSPI2_IO3_PE10  1 ;#PE10
	# set QSPI2_IO3_PG11 1 ;#PG11
	
	
	# set QSPI2_SCK_PB1 1 ;#PB1
	# set QSPI2_SCK_PG13  1 ;#PG13
	  
	# set QSPI2_CS_PB8 1 ;#PB8
	# set QSPI2_CS_PG8  1 ;#PG8
	
	
##############################QSPI2_IO0###############################	
	# QSPI_IO0: PB0, PE7, PG14
	
	if { [info exists QSPI2_IO0_PB0] && $QSPI2_IO0_PB0 } {	
		mmw 0x40020400 0x00000002 0
		mmw 0x40020408 0x00000001 0
		mmw 0x40020420 0x00000009 0
	}
	
	if { [info exists QSPI2_IO0_PE7] && $QSPI2_IO0_PE7 } {	
		mmw 0x40021000 0x00008000 0
		mmw 0x40021008 0x00004000 0
		mmw 0x40021020 0xA0000000 0
	}
	
	if { [info exists QSPI2_IO0_PG14] && $QSPI2_IO0_PG14 } {	
		mmw 0x40021800 0x20000000 0
		mmw 0x40021808 0x10000000 0
		mmw 0x40021824 0x05000000 0
	}
	
##############################QSPI2_IO1###############################	
	#QSPI_IO1: PA15, PB7, PC3, PE8, PG12
	
	if { [info exists QSPI2_IO1_PA15] && $QSPI2_IO1_PA15 } {	
		mmw 0x40020000 0x80000000 0
		mmw 0x40020008 0x40000000 0
		mmw 0x40020024 0x90000000 0
	}
	
	if { [info exists QSPI2_IO1_PB7] && $QSPI2_IO1_PB7 } {	
		mmw 0x40020400 0x00008000 0
		mmw 0x40020408 0x00004000 0
		mmw 0x40020420 0x90000000 0
	}
	
	if { [info exists QSPI2_IO1_PC3] && $QSPI2_IO1_PC3 } {	
		mmw 0x40020800 0x00000080 0
		mmw 0x40020808 0x00000040 0
		mmw 0x40020820 0x00009000 0
	}
	
	if { [info exists QSPI2_IO1_PE8] && $QSPI2_IO1_PE8 } {	
		mmw 0x40021000 0x00020000 0
		mmw 0x40021000 0x00010000 0
		mmw 0x40021024 0x0000000A 0
	}
	
	if { [info exists QSPI2_IO1_PG12] && $QSPI2_IO1_PG12 } {	
		mmw 0x40021800 0x02000000 0
		mmw 0x40021808 0x01000000 0
		mmw 0x40021824 0x00050000 0
	}
	
##############################QSPI2_IO2###############################		
	#QSPI_IO2: PA5, PE9, PG10
	
	if { [info exists QSPI2_IO2_PA5] && $QSPI2_IO2_PA5 } {	
	
		mmw 0x40020000 0x00000800 0
		mmw 0x40020008 0x00000400 0
		mmw 0x40020020 0x00900000 0
	}
	
	if { [info exists QSPI2_IO2_PE9] && $QSPI2_IO2_PE9 } {	
	
		mmw 0x40021000 0x00080000 0
		mmw 0x40021008 0x00040000 0
		mmw 0x40021024 0x000000A0 0
	}
	
	if { [info exists QSPI2_IO2_PG10] && $QSPI2_IO2_PG10 } {	
		mmw 0x40021800 0x00200000 0
		mmw 0x40021808 0x00100000 0
		mmw 0x40021824 0x00000500 0
	}
	
##############################QSPI2_IO3###############################		
	#QSPI_IO3: PA3, PE10, PG11
	
	if { [info exists QSPI2_IO3_PA3] && $QSPI2_IO3_PA3 } {	
	
		mmw 0x40020000 0x00000080 0
		mmw 0x40020008 0x00000040 0
		mmw 0x40020020 0x00009000 0
	}
	
	if { [info exists QSPI2_IO3_PE10] && $QSPI2_IO3_PE10 } {	
	
		mmw 0x40021000 0x00200000 0
		mmw 0x40021008 0x00100000 0
		mmw 0x40021024 0x00000A00 0
	}
	
	if { [info exists QSPI2_IO3_PG11] && $QSPI2_IO3_PG11 } {	
		mmw 0x40021800 0x00800000 0
		mmw 0x40021808 0x00400000 0
		mmw 0x40021824 0x00005000 0
	}
	
##############################QSPI2_SCK###############################		
	#QSPI_SCK: PB1, PG13
	
	if { [info exists QSPI2_SCK_PB1] && $QSPI2_SCK_PB1 } {	
		mmw 0x40020400 0x00000008 0
		mmw 0x40020408 0x00000004 0
		mmw 0x40020420 0x000000A0 0
	}
	
	if { [info exists QSPI2_SCK_PG13] && $QSPI2_SCK_PG13 } {	
		mmw 0x40021800 0x08000000 0
		mmw 0x40021808 0x04000000 0
		mmw 0x40021824 0x00500000 0
	}

	
##############################QSPI2_CS###############################		
	#QSPI_CS: PB8, PG8
	
	if { [info exists QSPI2_CS_PB8] && $QSPI2_CS_PB8 } {	
		mmw 0x40020400 0x00020000 0
		mmw 0x40020408 0x00010000 0
		mmw 0x40020424 0x0000000A 0
	}
	
	if { [info exists QSPI2_CS_PG8] && $QSPI2_CS_PG8 } {	
		mmw 0x40021800 0x00002000 0
		mmw 0x40021808 0x00001000 0
		mmw 0x40021824 0x00000005 0
	}
}