// // Created by cfif on 16.09.22. // #ifndef SERIALPORT_SERIALPORT_ARTERY_H #define SERIALPORT_SERIALPORT_ARTERY_H #include "SerialPort.h" #include "at32f435_437.h" #include "cmsis_os2.h" #include "stdbool.h" typedef struct { usart_type *uart; dma_channel_type *rxDmaChannel; dma_init_type dma_rx_init_struct; dma_init_type dma_tx_init_struct; uint32_t rxDmaFdtFlag;//full data transmit flag uint32_t txDmaFdtFlag;//full data transmit flag dma_channel_type *txDmaChannel; uint8_t *rxDmaBuf; uint32_t rxDmaOffset; // osMutexId_t dmaAccess; osMessageQueueId_t txAccessQueue; osMessageQueueId_t rxDataQueue; osMessageQueueId_t rxDataSnifferQueue; osMessageQueueId_t rxDataSnifferSecondQueue; } tSerialPortArtery; void vSerialPortInit( tSerialPortArtery *env, usart_type *uart, bool swap, uint32_t BoundRate, IRQn_Type irq, crm_periph_clock_type uartClock, uint8_t irqPriority, uint32_t rxBufferLength, uint32_t rxSnifferLength ); void vSerialPortInitExt( tSerialPortArtery *env, usart_type *uart, bool swap, usart_hardware_flow_control_type flow_control_type, uint32_t BoundRate, IRQn_Type irq, crm_periph_clock_type uartClock, uint8_t irqPriority, uint32_t rxBufferLength, uint32_t rxSnifferLength ); void vSerialPortInitDMA( tSerialPortArtery *env, usart_type *uart, dma_type *DMA_RX, dma_type *DMA_TX, dma_channel_type *RX_DMA_CHANNEL, dmamux_channel_type *RX_DMA_CHANNEL_MUX, dmamux_requst_id_sel_type RX_DMAMUX_DMAREQ_ID, IRQn_Type RX_DMA_Channel_IRQ, uint32_t RX_DMA_FDT_FLAG, uint8_t *DMA_BUF, uint16_t DMA_BUF_LEN, dma_channel_type *TX_DMA_CHANNEL, dmamux_channel_type *TX_DMA_CHANNEL_MUX, dmamux_requst_id_sel_type TX_DMAMUX_DMAREQ_ID, IRQn_Type TX_DMA_Channel_IRQ, uint32_t TX_DMA_FDT_FLAG, bool swap, uint32_t BoundRate, IRQn_Type irq, crm_periph_clock_type uartClock, uint8_t irqPriority, uint32_t rxBufferLength, uint32_t rxSnifferLength ); void vSerialPortInitDMAExt( tSerialPortArtery *env, usart_type *uart, dma_type *DMA_RX, dma_type *DMA_TX, dma_channel_type *RX_DMA_CHANNEL, dmamux_channel_type *RX_DMA_CHANNEL_MUX, dmamux_requst_id_sel_type RX_DMAMUX_DMAREQ_ID, IRQn_Type RX_DMA_Channel_IRQ, uint32_t RX_DMA_FDT_FLAG, uint8_t *DMA_BUF, uint16_t DMA_BUF_LEN, dma_channel_type *TX_DMA_CHANNEL, dmamux_channel_type *TX_DMA_CHANNEL_MUX, dmamux_requst_id_sel_type TX_DMAMUX_DMAREQ_ID, IRQn_Type TX_DMA_Channel_IRQ, uint32_t TX_DMA_FDT_FLAG, bool swap, usart_hardware_flow_control_type flow_control_type, uint32_t BoundRate, IRQn_Type irq, crm_periph_clock_type uartClock, uint8_t irqPriority, uint32_t rxBufferLength, uint32_t rxSnifferLength ); #define vSerialPortInitDMAName(ENV, NAME, DMA, RX_DMA_CHANNEL, RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID, RX_DMA_Channel_IRQ, RX_DMA_FDT_FLAG, DMA_BUF, DMA_BUF_LEN, TX_DMA_CHANNEL, TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID, TX_DMA_Channel_IRQ, TX_DMA_FDT_FLAG, SWAP, BOUND_RATE, PRIORITY, LEN) \ vSerialPortInitDMA(ENV, NAME, DMA, RX_DMA_CHANNEL, RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID, RX_DMA_Channel_IRQ, RX_DMA_FDT_FLAG, DMA_BUF, DMA_BUF_LEN, TX_DMA_CHANNEL, TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID, TX_DMA_Channel_IRQ, TX_DMA_FDT_FLAG, SWAP, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, 0) #define vSerialPortInitDMANameWithSniffer(ENV, NAME, DMA, RX_DMA_CHANNEL, RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID, RX_DMA_Channel_IRQ, RX_DMA_FDT_FLAG, DMA_BUF, DMA_BUF_LEN, TX_DMA_CHANNEL, TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID, TX_DMA_Channel_IRQ, TX_DMA_FDT_FLAG, SWAP, BOUND_RATE, PRIORITY, LEN, SNIFFER_LEN) \ vSerialPortInitDMA(ENV, NAME, DMA, RX_DMA_CHANNEL, RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID, RX_DMA_Channel_IRQ, RX_DMA_FDT_FLAG, DMA_BUF, DMA_BUF_LEN, TX_DMA_CHANNEL, TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID, TX_DMA_Channel_IRQ, TX_DMA_FDT_FLAG, SWAP, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, SNIFFER_LEN) #define DMANONE_CHANNELNONE NULL #define DMANONE NULL #define DMANONEMUX_CHANNELNONE NULL #define DMANONE_FDTNONE_FLAG (uint32_t)0 #define DMANONE_ChannelNONE_IRQn (IRQn_Type)0 #define vSerialPortInitDmaWithNameAndSniffer(\ ENV, NAME, BOUND_RATE, \ RX_DMA, RX_CH, \ TX_DMA, TX_CH, \ SWAP, PRIORITY, \ RX_DMA_BUF, RX_DMA_BUF_LEN, \ QUEUE_LEN, SNIFFER_LEN \ ) \ vSerialPortInitDMA(\ ENV, NAME, DMA##RX_DMA, DMA##TX_DMA, \ DMA##RX_DMA##_CHANNEL##RX_CH, DMA##RX_DMA##MUX_CHANNEL##RX_CH, DMAMUX_DMAREQ_ID_##NAME##_RX, DMA##RX_DMA##_Channel##RX_CH##_IRQn, DMA##RX_DMA##_FDT##RX_CH##_FLAG,\ RX_DMA_BUF, RX_DMA_BUF_LEN, \ DMA##TX_DMA##_CHANNEL##TX_CH, DMA##TX_DMA##MUX_CHANNEL##TX_CH, DMAMUX_DMAREQ_ID_##NAME##_TX, DMA##TX_DMA##_Channel##TX_CH##_IRQn, DMA##TX_DMA##_FDT##TX_CH##_FLAG,\ SWAP, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, \ PRIORITY, QUEUE_LEN, SNIFFER_LEN\ ) #define vSerialPortInitDmaExtWithNameAndSniffer(\ ENV, NAME, BOUND_RATE, \ RX_DMA, RX_CH, \ TX_DMA, TX_CH, \ SWAP, FLOW, PRIORITY, \ RX_DMA_BUF, RX_DMA_BUF_LEN, \ QUEUE_LEN, SNIFFER_LEN \ ) \ vSerialPortInitDMAExt(\ ENV, NAME, DMA##RX_DMA, DMA##TX_DMA, \ DMA##RX_DMA##_CHANNEL##RX_CH, DMA##RX_DMA##MUX_CHANNEL##RX_CH, DMAMUX_DMAREQ_ID_##NAME##_RX, DMA##RX_DMA##_Channel##RX_CH##_IRQn, DMA##RX_DMA##_FDT##RX_CH##_FLAG,\ RX_DMA_BUF, RX_DMA_BUF_LEN, \ DMA##TX_DMA##_CHANNEL##TX_CH, DMA##TX_DMA##MUX_CHANNEL##TX_CH, DMAMUX_DMAREQ_ID_##NAME##_TX, DMA##TX_DMA##_Channel##TX_CH##_IRQn, DMA##TX_DMA##_FDT##TX_CH##_FLAG,\ SWAP, FLOW, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, \ PRIORITY, QUEUE_LEN, SNIFFER_LEN\ ) #define vSerialPortInitName(ENV, NAME, SWAP, BOUND_RATE, PRIORITY, LEN) \ vSerialPortInit(ENV, NAME, SWAP, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, 0) #define vSerialPortExtInitName(ENV, NAME, SWAP, FLOW, BOUND_RATE, PRIORITY, LEN) \ vSerialPortInit(ENV, NAME, SWAP, FLOW, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, 0) #define vSerialPortInitNameWithSniffer(ENV, NAME, SWAP, BOUND_RATE, PRIORITY, LEN, SNIFFER_LEN) \ vSerialPortInit(ENV, NAME, SWAP, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, SNIFFER_LEN) #define vSerialPortExtInitNameWithSniffer(ENV, NAME, SWAP, FLOW, BOUND_RATE, PRIORITY, LEN, SNIFFER_LEN) \ vSerialPortInit(ENV, NAME, SWAP, FLOW, BOUND_RATE, NAME##_IRQn, CRM_##NAME##_PERIPH_CLOCK, PRIORITY, LEN, SNIFFER_LEN) void vSerialPortIrqProcessing(tSerialPortArtery *env); void vSerialPortIrqProcessingDMA(tSerialPortArtery *env); //void vSerialPortIrqProcessingDMAloop(tSerialPortArtery *env, uint32_t len); void SerialPort_IrqProcessing_UartIdle(tSerialPortArtery *env); void SerialPort_IrqProcessing_DmaRxLoop(tSerialPortArtery *env); void SerialPort_IrqProcessingFilter_UartIdle(tSerialPortArtery *env, tSerialPortIO *virtualPort, uint16_t *counterBufFilterStr, uint8_t *bufStrFilter, uint16_t maxBufStrFilter, const char *FilterStr[], uint8_t countFiler); void SerialPort_IrqProcessingFilter_DmaRxLoop(tSerialPortArtery *env, tSerialPortIO *virtualPort, uint16_t *counterBufFilterStr, uint8_t *bufStrFilter, uint16_t maxBufStrFilter, const char *FilterStr[], uint8_t countFiler); void SerialPort_IrqProcessing_DmaTx(tSerialPortArtery *env); tSerialPortIO vSerialPortGetIo(tSerialPortArtery *env); tSerialPortIO vSerialPortGetSnifferIo(tSerialPortArtery *env); tSerialPortIO SerialPort_GetSnifferSecondIo(tSerialPortArtery *env); uint16_t vSerialPortTransmit(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout); uint16_t vSerialPortBlindTransmit(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout); void SerialPort_IrqProcessing_DmaTxBlind(tSerialPortArtery *env); #endif //SERIALPORT_SERIALPORT_ARTERY_H