From 53fc83abf122833b3fc6222cf473fc8cc1d049cc Mon Sep 17 00:00:00 2001 From: cfif Date: Wed, 4 Dec 2024 13:10:47 +0300 Subject: [PATCH] Init --- SerialPorts.c | 166 ++++++++++++++++++++++++++++++++++++++++++++++++++ SerialPorts.h | 55 +++++++++++++++++ modular.json | 32 ++++++++++ 3 files changed, 253 insertions(+) create mode 100644 SerialPorts.c create mode 100644 SerialPorts.h create mode 100644 modular.json diff --git a/SerialPorts.c b/SerialPorts.c new file mode 100644 index 0000000..dd5ff86 --- /dev/null +++ b/SerialPorts.c @@ -0,0 +1,166 @@ +// +// Created by xemon on 29.08.22. +// +#include "SerialPorts.h" +#include "SerialPort.h" +#include "CanSerialPorts.h" + +tSerialPorts SERIAL_PORTS; +uint8_t buf_UART1_DMA[128]; +uint8_t buf_UART2_DMA[128]; +uint8_t buf_UART4_DMA[128]; + +void vSerialPorts_InitRCC() { + //Включаем тактирование шины APB1 для устройств USART2, UART4 + //Enable clock APB1 for USART2, UART4, UART5 + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART2, ENABLE); + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART4, ENABLE); + +#ifdef USE_GSM_AND_GNSS_SIMCOM + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART5, ENABLE); +#endif + + //Включаем тактирование шины APB2 для устройств AFIO, USART1 + //Enable clock APB1 -> AFIO, USART1 + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_USART1, ENABLE); + +} + +static void vSerialPort_InitUART1(tSerialPortNation *env, tGpioPin *transmitePin, tGpioPin *recivePin) { + GPIO_ConfigPinRemap(GPIO_RMP_USART1, ENABLE); + + //Init UART1 Rx Pin + GpioPin_InitConfigOnly(GPIOB, GPIO_PIN_7, GPIO_Mode_IN_FLOATING, GPIO_INPUT); + + //Init UART1 Tx Pin + GpioPin_InitConfigOnly(GPIOB, GPIO_PIN_6, GPIO_Mode_AF_PP, GPIO_Speed_50MHz); + + GpioPinSet(transmitePin, false); + GpioPinSet(recivePin, false); + +// SerialPort_InitName(env, USART1, 115200, 0xFF, 1024); + + vSerialPortInitDMA(env, USART1, + DMA1, DMA1_CH5, DMA1_Channel5_IRQn, DMA1_INT_TXC5, + DMA1, DMA1_CH4, DMA1_Channel4_IRQn, DMA1_INT_TXC4, + buf_UART1_DMA, sizeof(buf_UART1_DMA), + 115200, USART1_IRQn , 0xFF, 512, 0 + ); + +} + +static void vSerialPort_InitUART2(tSerialPortNation *env) { + GPIO_ConfigPinRemap(GPIO_RMP1_USART2, ENABLE); + + //Init UART2 Rx Pin + GpioPin_InitConfigOnly(GPIOD, GPIO_PIN_6, GPIO_Mode_IN_FLOATING, GPIO_INPUT); + + //Init UART2 Tx Pin + GpioPin_InitConfigOnly(GPIOD, GPIO_PIN_5, GPIO_Mode_AF_OD, GPIO_Speed_50MHz); + +// vSerialPortInitNameWithSniffer(env, USART2, 115200, 0xFF, 1024, 1024); + vSerialPortInitDMA(env, USART2, + DMA1, DMA1_CH6, DMA1_Channel6_IRQn, DMA1_INT_TXC6, + DMA1, DMA1_CH7, DMA1_Channel7_IRQn, DMA1_INT_TXC7, + buf_UART2_DMA, sizeof(buf_UART2_DMA), + 115200, USART2_IRQn , 0xFF, 512, 512 + ); +} + +static void vSerialPort_InitUART4(tSerialPortNation *env) { + //Init UART4 Rx Pin + GpioPin_InitConfigOnly(GPIOC, GPIO_PIN_11, GPIO_Mode_IN_FLOATING, GPIO_INPUT); + + //Init UART4 Tx Pin + GpioPin_InitConfigOnly(GPIOC, GPIO_PIN_10, GPIO_Mode_AF_PP, GPIO_Speed_50MHz); + + SerialPort_InitName(env, UART4, 115200, 0xFF, 1024); + + vSerialPortInitDMA(env, UART4, + DMA2, DMA2_CH3, DMA2_Channel3_IRQn, DMA2_INT_TXC3, + DMA2, DMA2_CH5, DMA2_Channel5_IRQn, DMA2_INT_TXC5, + buf_UART4_DMA, sizeof(buf_UART4_DMA), + 115200, UART4_IRQn, 0xFF, 512, 0 + ); +} + + +void USART2_IRQHandler() { +// vSerialPortIrqProcessing(&SERIAL_PORTS.TelitPort); + SerialPort_IrqProcessing_UartIdle(&SERIAL_PORTS.TelitPort); +} +/// UUSSBB +void USART1_IRQHandler() { +// vSerialPortIrqProcessing(&SERIAL_PORTS.ComIntPort); + SerialPort_IrqProcessing_UartIdle(&SERIAL_PORTS.ComIntPort); +} + +void UART4_IRQHandler() { +// vSerialPortIrqProcessing(&SERIAL_PORTS.DebugPort); + SerialPort_IrqProcessing_UartIdle(&SERIAL_PORTS.DebugPort); +} + +void DMA1_Channel5_IRQHandler(){ + SerialPort_IrqProcessing_DmaRxLoop(&SERIAL_PORTS.ComIntPort); +} +void DMA1_Channel4_IRQHandler(){ + SerialPort_IrqProcessing_DmaTx(&SERIAL_PORTS.ComIntPort ); +} + +void DMA1_Channel6_IRQHandler(){ + SerialPort_IrqProcessing_DmaRxLoop(&SERIAL_PORTS.TelitPort); +} +void DMA1_Channel7_IRQHandler(){ + SerialPort_IrqProcessing_DmaTx(&SERIAL_PORTS.TelitPort ); +} + +void DMA2_Channel3_IRQHandler() { + SerialPort_IrqProcessing_DmaRxLoop(&SERIAL_PORTS.DebugPort); +} +void DMA2_Channel5_IRQHandler() { + SerialPort_IrqProcessing_DmaTx(&SERIAL_PORTS.DebugPort); +} + +void SerialPorts_Init(tRs485DirectionPins *power) { + tSerialPorts *env = &SERIAL_PORTS; + + vSerialPorts_InitRCC(); + + vSerialPort_InitUART1(&env->ComIntPort, &power->transmit, + &power->receive); + + vSerialPort_InitUART2(&env->TelitPort); + + vSerialPort_InitUART4(&env->DebugPort); + + env->ComIntIO = SerialPort_GetIo(&env->ComIntPort); + + env->TelitIO = SerialPort_GetIo(&env->TelitPort); + env->TelitIOSniffer = SerialPort_GetSnifferIo(&env->TelitPort); + + env->DebugIO = SerialPort_GetIo(&env->DebugPort); + + env->ComIntHalfDuplex = vSerialPortHalfDuplexInit(&env->ComIntIO, + &power->transmit, + &power->receive); + + env->ComIntHalfDuplexIo = vSerialPortHalfDuplexGetIo(&env->ComIntHalfDuplex); + + SerialPortP2p_Init(&env->cliVirtualPort, 1 * 1024, 512); + env->cliVirtualInIo = SerialPortP2p_GetIoFirst(&env->cliVirtualPort); + env->cliVirtualOutIo = SerialPortP2p_GetIoSecond(&env->cliVirtualPort); + +// SerialPortUsb_Init(&env->SerialPortUsb, 1024); +// env->SerialPortUsbIO = SerialPortUsb_GetIo(&env->SerialPortUsb); + + vCanSerialPorts_InitRCC(); + CanHWControlSet(); + vCanSerialPort_InitCAN1(&env->SerialPortCan1); + + vCanSerialPort_InitCAN2(&env->SerialPortCan2); + env->SerialPortCan2IO = CanPort_GetIo(&env->SerialPortCan2); +} + + + diff --git a/SerialPorts.h b/SerialPorts.h new file mode 100644 index 0000000..42529e3 --- /dev/null +++ b/SerialPorts.h @@ -0,0 +1,55 @@ +// +// Created by xemon on 29.08.22. +// + +#ifndef UVEOS_DEMO_ON_NIIET_MCU_SERIALPORTS_H +#define UVEOS_DEMO_ON_NIIET_MCU_SERIALPORTS_H + +#include "SerialPortNation.h" +#include "SerialPortHalfDuplexIO.h" +#include "GpioPin.h" +#include "SerialPortP2p.h" +#include "SerialPort_USB.h" +#include "CanSerialPort.h" + +typedef struct { + tGpioPin receive; + tGpioPin transmit; +} tRs485DirectionPins; + +typedef struct { + + tSerialPortNation TelitPort; + tSerialPortIO TelitIO; + + tSerialPortNation ComIntPort; + tSerialPortIO ComIntIO; + + tSerialPortNation DebugPort; + tSerialPortIO DebugIO; + + tSerialPortHalfDuplex ComIntHalfDuplex; + tSerialPortIO ComIntHalfDuplexIo; + + + tSerialPortIO TelitIOSniffer; + + tSerialPortP2p cliVirtualPort; + tSerialPortIO cliVirtualInIo; + tSerialPortIO cliVirtualOutIo; + + TSerialPortUsbNation SerialPortUsb; + tSerialPortIO SerialPortUsbIO; + + tCanSerialPortNation SerialPortCan1; + tSerialPortIO SerialPortCan1IO; + + tCanSerialPortNation SerialPortCan2; + tSerialPortIO SerialPortCan2IO; +} tSerialPorts; + +extern tSerialPorts SERIAL_PORTS; + +void SerialPorts_Init(tRs485DirectionPins *power); + +#endif //UVEOS_DEMO_ON_NIIET_MCU_SERIALPORTS_H diff --git a/modular.json b/modular.json new file mode 100644 index 0000000..b08c1a7 --- /dev/null +++ b/modular.json @@ -0,0 +1,32 @@ +{ + "dep": [ + { + "type": "git", + "provider": "NAVIGATOR_UVEOS_NATION_TELIT", + "repo": "SerialPort_NATION_N32G45x_v2" + }, + { + "type": "git", + "provider": "NAVIGATOR_UVEOS_NATION_TELIT", + "repo": "SerialPortInterface" + }, + { + "type": "git", + "provider": "NAVIGATOR_UVEOS_NATION_TELIT", + "repo": "SerialPortHalfDuplexInterface" + }, + { + "type": "git", + "provider": "NAVIGATOR_UVEOS_NATION_TELIT", + "repo": "SerialPort_P2P_CmsisRtos" + } + ], + "cmake": { + "inc_dirs": [ + "./" + ], + "srcs": [ + "SerialPorts.c" + ] + } +} \ No newline at end of file