109 lines
3.4 KiB
C
109 lines
3.4 KiB
C
/*****************************************************************************
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* Copyright (c) 2019, Nations Technologies Inc.
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*
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* All rights reserved.
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* ****************************************************************************
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Nations' name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ****************************************************************************/
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/**
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* @file main.h
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* @author Nations
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* @version v1.0.0
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*
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* @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
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*/
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#ifndef __MAIN_H__
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#define __MAIN_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "n32g45x.h"
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#define _USART1_COM_
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//#define _USART4_COM_
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//#define _USART2_COM_
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// A 10 9
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#ifdef _USART1_COM_
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#define USARTx USART1
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#define USARTx_GPIO GPIOB
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#define USARTx_CLK RCC_APB2_PERIPH_USART1
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#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#define USARTx_RxPin GPIO_PIN_7
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#define USARTx_TxPin GPIO_PIN_6
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#define UARTx_IRQn USART1_IRQn
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#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
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#define USART_APBxClkCmd RCC_EnableAPB2PeriphClk
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#endif
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//#ifdef _USART1_COM_
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//#define USARTx USART1
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//#define USARTx_GPIO GPIOA
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//#define USARTx_CLK RCC_APB2_PERIPH_USART1
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//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOA
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//#define USARTx_RxPin GPIO_PIN_10
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//#define USARTx_TxPin GPIO_PIN_9
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//
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//#define UARTx_IRQn USART1_IRQn
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//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
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//#define USART_APBxClkCmd RCC_EnableAPB2PeriphClk
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//#endif
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//#ifdef _USART4_COM_
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//#define USARTx UART4
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//#define USARTx_GPIO GPIOC
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//#define USARTx_CLK RCC_APB1_PERIPH_UART4
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//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOC
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//#define USARTx_RxPin GPIO_PIN_11
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//#define USARTx_TxPin GPIO_PIN_10
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//
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//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
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//#define USART_APBxClkCmd RCC_EnableAPB1PeriphClk
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//#define UARTx_IRQn UART4_IRQn
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//#endif
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//
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//#ifdef _USART2_COM_
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//#define USARTx USART2
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//#define USARTx_GPIO GPIOD
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//#define USARTx_CLK RCC_APB1_PERIPH_USART2
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//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOD
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//#define USARTx_RxPin GPIO_PIN_6
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//#define USARTx_TxPin GPIO_PIN_5
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//
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//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
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//#define USART_APBxClkCmd RCC_EnableAPB1PeriphClk
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//#define UARTx_IRQn USART2_IRQn
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//
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//#endif
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//
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//#ifdef __cplusplus
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//}
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//#endif
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#endif /* __MAIN_H__ */ |