UveosOnNation_VEGA_RawHwTes.../uartTest/main.h

109 lines
3.4 KiB
C

/*****************************************************************************
* Copyright (c) 2019, Nations Technologies Inc.
*
* All rights reserved.
* ****************************************************************************
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Nations' name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ****************************************************************************/
/**
* @file main.h
* @author Nations
* @version v1.0.0
*
* @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
*/
#ifndef __MAIN_H__
#define __MAIN_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "n32g45x.h"
#define _USART1_COM_
//#define _USART4_COM_
//#define _USART2_COM_
// A 10 9
#ifdef _USART1_COM_
#define USARTx USART1
#define USARTx_GPIO GPIOB
#define USARTx_CLK RCC_APB2_PERIPH_USART1
#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOB
#define USARTx_RxPin GPIO_PIN_7
#define USARTx_TxPin GPIO_PIN_6
#define UARTx_IRQn USART1_IRQn
#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
#define USART_APBxClkCmd RCC_EnableAPB2PeriphClk
#endif
//#ifdef _USART1_COM_
//#define USARTx USART1
//#define USARTx_GPIO GPIOA
//#define USARTx_CLK RCC_APB2_PERIPH_USART1
//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOA
//#define USARTx_RxPin GPIO_PIN_10
//#define USARTx_TxPin GPIO_PIN_9
//
//#define UARTx_IRQn USART1_IRQn
//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
//#define USART_APBxClkCmd RCC_EnableAPB2PeriphClk
//#endif
//#ifdef _USART4_COM_
//#define USARTx UART4
//#define USARTx_GPIO GPIOC
//#define USARTx_CLK RCC_APB1_PERIPH_UART4
//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOC
//#define USARTx_RxPin GPIO_PIN_11
//#define USARTx_TxPin GPIO_PIN_10
//
//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
//#define USART_APBxClkCmd RCC_EnableAPB1PeriphClk
//#define UARTx_IRQn UART4_IRQn
//#endif
//
//#ifdef _USART2_COM_
//#define USARTx USART2
//#define USARTx_GPIO GPIOD
//#define USARTx_CLK RCC_APB1_PERIPH_USART2
//#define USARTx_GPIO_CLK RCC_APB2_PERIPH_GPIOD
//#define USARTx_RxPin GPIO_PIN_6
//#define USARTx_TxPin GPIO_PIN_5
//
//#define GPIO_APBxClkCmd RCC_EnableAPB2PeriphClk
//#define USART_APBxClkCmd RCC_EnableAPB1PeriphClk
//#define UARTx_IRQn USART2_IRQn
//
//#endif
//
//#ifdef __cplusplus
//}
//#endif
#endif /* __MAIN_H__ */