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Pwm_Flagchip_FC7240
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Обновление

This commit is contained in:
cfif 2025-10-17 13:26:07 +03:00
parent babf93dad6
commit e4e71bb312
2 changed files with 28 additions and 31 deletions
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5
Inc/PwmFlagchip.h
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@ -20,7 +20,8 @@ typedef struct {
} tPwmFlagchip; } tPwmFlagchip;
tPwmFlagchip PWM_Initial( void PWM_Initial(
tPwmFlagchip *env,
uint32_t PeriodTime, uint32_t PeriodTime,
uint32_t ActiveTime, uint32_t ActiveTime,
uint8_t TPU_PWM_CHANNEL, uint8_t TPU_PWM_CHANNEL,
@ -30,6 +31,8 @@ tPwmFlagchip PWM_Initial(
tPwmIO vPwmGetIo(tPwmFlagchip *env); tPwmIO vPwmGetIo(tPwmFlagchip *env);
void Get_Set_Tpu_PwmCallback(tPwmFlagchip *env);
// Частота шины // Частота шины
#define BUS_CLK 120000000U #define BUS_CLK 120000000U

54
Src/PwmFlagchip.c
View File

@ -5,12 +5,13 @@
#include "PwmFlagchip.h" #include "PwmFlagchip.h"
void Set_Tpu_PwmCallback(tPwmFlagchip *env) { void Get_Set_Tpu_PwmCallback(tPwmFlagchip *env) {
TPU_PwmServiceReq(env->TPU_PWM_CHANNEL, env->etpu_pwmconfig_tbl.u32ActiveTime, TPU_PwmServiceReq(env->TPU_PWM_CHANNEL, env->etpu_pwmconfig_tbl.u32ActiveTime,
env->etpu_pwmconfig_tbl.u32PeriodTime); env->etpu_pwmconfig_tbl.u32PeriodTime);
} }
tPwmFlagchip PWM_Initial( void PWM_Initial(
tPwmFlagchip *env,
uint32_t PeriodTime, uint32_t PeriodTime,
uint32_t ActiveTime, uint32_t ActiveTime,
uint8_t TPU_PWM_CHANNEL, uint8_t TPU_PWM_CHANNEL,
@ -19,38 +20,31 @@ tPwmFlagchip PWM_Initial(
TPU_TCR1OverflowCallbackType Bsp_Tpu_OverflowCallBack) { TPU_TCR1OverflowCallbackType Bsp_Tpu_OverflowCallBack) {
tPwmFlagchip pwm = { env->etpu_pwmconfig_tbl.eTBS1 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1;
env->etpu_pwmconfig_tbl.eTBS2 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1;
.etpu_pwmconfig_tbl = { env->etpu_pwmconfig_tbl.bPwmUseTCR1 = (bool) true;
.eTBS1 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1, env->etpu_pwmconfig_tbl.bPwmUseTCR2 = (bool) false;
.eTBS2 = TPUE_EQUAL_ONLY_CAPBASE_TCR1_MATCHBASE_TCR1, env->etpu_pwmconfig_tbl.u32ActiveTime = ActiveTime;
.bPwmUseTCR1 = (bool) true, env->etpu_pwmconfig_tbl.u32PeriodTime = PeriodTime;
.bPwmUseTCR2 = (bool) false, env->etpu_pwmconfig_tbl.bActiveHigh = (bool) true;
.u32ActiveTime = ActiveTime,
.u32PeriodTime = PeriodTime,
.bActiveHigh = (bool) true
},
.etpu_Int_config_tbl = {
.bEventIntEn = (bool) true,
.bTCR1OverFlowEventIntEn = (bool) true,
.bTCR2OverFlowEventIntEn = (bool) false,
.pEventNotify = Bsp_Tpu_PwmCallback,
.pHSANotify = NULL,
.pTCR1OverflowNotify = Bsp_Tpu_OverflowCallBack,
.pTCR2OverflowNotify = NULL,
.eChTrigType = TPUH_ANY_EVENT_GATED_BY_MSRTSR
},
.TPU_PWM_CHANNEL = TPU_PWM_CHANNEL
}; env->etpu_Int_config_tbl.bEventIntEn = (bool) true;
env->etpu_Int_config_tbl.bTCR1OverFlowEventIntEn = (bool) true;
env->etpu_Int_config_tbl.bTCR2OverFlowEventIntEn = (bool) false;
env->etpu_Int_config_tbl.pEventNotify = Bsp_Tpu_PwmCallback;
env->etpu_Int_config_tbl.pHSANotify = NULL;
env->etpu_Int_config_tbl.pTCR1OverflowNotify = Bsp_Tpu_OverflowCallBack;
env->etpu_Int_config_tbl.pTCR2OverflowNotify = NULL;
env->etpu_Int_config_tbl.eChTrigType = TPUH_ANY_EVENT_GATED_BY_MSRTSR;
env->TPU_PWM_CHANNEL = TPU_PWM_CHANNEL;
TPU_DeInit(); TPU_DeInit();
TPU_Init(); TPU_Init();
TPU_PwmModeInit(TPU_PWM_CHANNEL, &pwm.etpu_pwmconfig_tbl); TPU_PwmModeInit(TPU_PWM_CHANNEL, &env->etpu_pwmconfig_tbl);
TPU_InitChannelInterrupt(TPU_PWM_CHANNEL, &pwm.etpu_Int_config_tbl); TPU_InitChannelInterrupt(TPU_PWM_CHANNEL, &env->etpu_Int_config_tbl);
NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUP_4); NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUP_4);
@ -67,7 +61,7 @@ tPwmFlagchip PWM_Initial(
NVIC_EnableIRQ(TPU0_CH24_31_IRQn); NVIC_EnableIRQ(TPU0_CH24_31_IRQn);
NVIC_SetPriority(TPU0_CH24_31_IRQn, TPU0_CH_PRIORITY); NVIC_SetPriority(TPU0_CH24_31_IRQn, TPU0_CH_PRIORITY);
} }
return pwm;
} }
static void vPwmRun(tPwmFlagchip *env) { static void vPwmRun(tPwmFlagchip *env) {