205 lines
5.8 KiB
C
205 lines
5.8 KiB
C
/**
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* @file module_driver_cpm.h
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* @author Flagchip
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* @brief CPM driver type definition and API
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* @version 2.0.0
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* @date 2024-08-20
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*
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* SDK Version: 2.6.0
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*
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* @copyright Copyright (c) 2020-2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2023-12-15 Flagchip120 N/A First version for FC7300
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* 2.0.0 2024-10-12 Flagchip120 N/A Change version and release
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******************************************************************************** */
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#ifndef _DRIVER_MODULE_DRIVER_CPM_H_
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#define _DRIVER_MODULE_DRIVER_CPM_H_
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#include "device_header.h"
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#include "HwA_cpm.h"
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#if CPM_INSTANCE_COUNT > 0U
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* @addtogroup module_driver_cpm
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* @{
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*/
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/** @brief Cpm return type. */
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typedef enum
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{
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CPM_STATUS_SUCCESS = 0U, /*!< CPM status success */
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CPM_STATUS_PARAM_INVALID = 1U /*!< CPM status parameter invalid */
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} CPM_RetType;
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/**
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* @brief FPU INTERRUPT type.
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*
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* This provides constants for FPU interrupt type for use in the FPU functions.
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* Please refer to Reference Manual chapter 14 CPM, it introduce register FISCR for details.
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*
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*/
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typedef enum
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{
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CPM_FPU_FIO = 1U, /*!< in function CPM_FpuIntMode, set CPM_FISCR FIOCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FIOC Status*/
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CPM_FPU_FDZ = 2U, /*!< in function CPM_FpuIntMode, set CPM_FISCR FDZCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FDZC Status*/
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CPM_FPU_FUF = 4U, /*!< in function CPM_FpuIntMode, set CPM_FISCR FUFCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FUFC Status*/
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CPM_FPU_FOF = 8U, /*!< in function CPM_FpuIntMode, set CPM_FISCR FOFCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FOFC Status*/
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CPM_FPU_FID = 16U, /*!< in function CPM_FpuIntMode, set CPM_FISCR FIDCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FIDC Status*/
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CPM_FPU_FIX = 32U /*!< in function CPM_FpuIntMode, set CPM_FISCR FIXCE bit; in function CPM_GetFpuIntStatus, get CPM_FISCR FIXC Status*/
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} FPU_IntType;
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typedef enum
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{
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CPM_MISCR_CPUCORE0 = 1U,
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CPM_MISCR_CPUCORE1 = 2U,
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CPM_MISCR_CPUCORE2 = 4U,
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CPM_MISCR_HSM = 8U
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} CPM_MISCRCoreActiveType;
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/**
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* @brief The instance index of the CPM peripheral
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*
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*/
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typedef enum
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{
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CPM_INSTANCE_0 = 0U
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} CPM_InstanceType;
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/**
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* @brief The structure of the CPM processing handle
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*
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*/
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typedef struct _CPM_HandleType
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{
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CPM_InstanceType eInstance; /*!< CPM instance*/
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char _aligned[3];
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struct
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{
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void (*pCpmCallback)(struct _CPM_HandleType *pHandle); /*!< fault interrupt callback */
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} tSettings;
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} CPM_HandleType;
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/** @brief Cpm interrupt configuration type */
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typedef struct
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{
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uint8_t u8CpmEnable; /**< whether enable cpm interrupt */
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FPU_IntType eFPU_IntType; /**< the type of interrupt */
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void (*pIsrNotify)(CPM_HandleType *pHandle); /**< Cpm interrupt notification function pointer */
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} CPM_InterruptType;
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#ifdef FPU_USED_ENABLE
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/**
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* @brief CPM_Read_FPSCR
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* Return the current value of FPSCR
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* @return u32RetVal
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*/
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uint32_t CPM_Read_FPSCR(void);
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/**
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* @brief CPM_Write_FPSCR
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*
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* @param u32SetVal set the value for FPSCR
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*/
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void CPM_Write_FPSCR(uint32_t u32SetVal);
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/**
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* @brief Deinit Cpm set interrupt
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*
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* Restore the Cpm FISCR to its reset state
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*
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* @param pCpmHandle CPM handle
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*/
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void CPM_DeInitInterrupt(CPM_HandleType* pCpmHandle);
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#endif
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/* ----------------------------------------------------------------------------
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-- Global Api
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---------------------------------------------------------------------------- */
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/**
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* @brief Configures the CPM module interrupts.
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*
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* This function configures the CPM module interrupts to enable/disable various interrupt sources.
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*
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* @param pCpmHandle CPM handle
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* @param eIntSrc CPM FPU interrupt type. refer CPM FISCR register
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* @param bEnable true: interrupt enable, false:interrupt disable.
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*/
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void CPM_FpuIntMode(CPM_HandleType* pCpmHandle, FPU_IntType eIntSrc, bool bEnable);
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/**
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* @brief Get CPM Interrupt occurred flag
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*
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* This function returns the interrupt flag.
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*
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* @param pCpmHandle CPM handle
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* @param eIntSrc CPM FPU interrupt type. refer CPM FISCR register
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* @return true interrupt occurred
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* @return false No interrupt
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*/
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bool CPM_GetFpuIntStatus(CPM_HandleType* pCpmHandle, FPU_IntType eIntSrc);
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#if (CPM_CONTAIN_CPUID == STD_ON)
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/**
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* @brief Get core mode
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*
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* This function returns the interrupt flag.
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*
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* @return the value of core
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*/
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uint32_t CPM_MiscrGetCoreMode(CPM_HandleType* pCpmHandle);
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#endif
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/**
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* @brief Gets the value of the FIscr register.
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*
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* This function retrieves the value of the FIscr register using the provided CPM module handle.
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* The FIscr register contains status information about interrupts and exceptions within the CPM module.
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* Reading this register's value provides insight into the current state of interrupts and exceptions.
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*
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* @param pCpmHandle Pointer to the CPM module handle. This handle identifies the CPM instance to be accessed.
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* @return uint32_t The value of the FIscr register.
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*/
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uint32_t CPM_GetFiscr(CPM_HandleType* pCpmHandle);
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/**
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* @brief Cpm set interrupt
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*
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* @param pCpmHandle CPM handle
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* @param pIntStruct interrupt structure pointer
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* @return Cpm return type
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*/
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CPM_RetType CPM_InitInterrupt(CPM_HandleType* pCpmHandle, const CPM_InterruptType *pIntStruct);
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/**
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* @brief CPM interrupt function
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*
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* @param pCpmHandle CPM handle
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*/
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void CPM_CommonProcessInterrupt(CPM_HandleType* pCpmHandle);
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#if defined(__cplusplus)
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}
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#endif
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#endif
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/** @}*/ /* module_driver_cpm */
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#endif
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