357 lines
14 KiB
C
357 lines
14 KiB
C
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/**
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* @file module_driver_fcspi.h
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* @author Flagchip
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* @brief ADC driver type definition and API
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* @version 2.0.0
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* @date 2024-12-22
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*
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* SDK Version: 2.6.0
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*
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* @copyright Copyright (c) 2020-2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 2.0.0 2024-12-22 Flagchip071 N/A First release
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******************************************************************************** */
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#ifndef _DRIVER_MODULE_DRIVER_FCSPI_H_
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#define _DRIVER_MODULE_DRIVER_FCSPI_H_
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#include "HwA_fcspi.h"
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#if FCSPI_INSTANCE_COUNT > 0U
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/**
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* @addtogroup module_driver_fcspi
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*
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* @{
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*/
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#include "module_driver_dma.h"
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#define FCSPI_DEV_ERROR_REPORT STD_ON
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* @name FCSPI API Service IDs
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*
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* @{
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*/
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#define FCSPI_INIT_ID 0U
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#define FCSPI_DEINIT_ID 1U
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#define FCSPI_TRANSMIT_ID 3U
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#define FCSPI_RECEIVE_ID 4U
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#define FCSPI_TRANSMITRECEIVE_ID 5U
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#define FCSPI_TRANSMIT_IT_ID 6U
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#define FCSPI_RECEIVE_IT_ID 7U
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#define FCSPI_TRANSMITRECEIVE_IT_ID 8U
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#define FCSPI_TRANSMIT_DMA_ID 9U
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#define FCSPI_RECEIVE_DMA_ID 10U
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#define FCSPI_TRANSMITRECEIVE_DMA_ID 11U
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/** @}*/
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/**
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* @name FCSPI Dev Error Code
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* @brief Error Code of calling FCSPI apis
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*
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* @{
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*/
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#define FCSPI_E_PARAM_UNINIT 0x01U /* API service called without module initialization */
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#define FCSPI_E_PARAM_POINTER 0x02U /* API service called with an unexpected value for the pointer */
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#define FCSPI_E_PARAM_CONFIG 0x03U /* API service called with unreasonable configuration */
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/** @}*/
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/**
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* @brief FCSPI states
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*
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*/
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typedef enum {
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FCSPI_STATE_UNINIT = 0x00U, /*!< Peripheral not Initialized */
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FCSPI_STATE_IDLE = 0x01U, /*!< Peripheral Initialized and idle for use */
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FCSPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
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FCSPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
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FCSPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
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FCSPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
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FCSPI_STATE_ERROR = 0x06U, /*!< SPI error state */
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FCSPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */
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} FCSPI_StateType;
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/**
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* @brief Return value of FCSPI API services.
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*
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*/
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typedef enum {
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FCSPI_STATUS_SUCCESS = 0x0U, /*!< The FCSPI operation is succeed */
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FCSPI_STATUS_ERROR = 0x1U, /*!< The FCSPI operation is failed */
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FCSPI_STATUS_TIMEOUT = 0x2U /*!< The FCSPI operation is failed because of time out */
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} FCSPI_StatusType;
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/**
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* @brief Data acess width according to differen frame size user configured.
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*
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*/
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typedef enum {
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FCSPI_DATA_ACCESS_8_BIT = 0x0U, /*!< Access FCSPI DATA register and Tx/Rx buffer by byte */
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FCSPI_DATA_ACCESS_16_BIT = 0x1U, /*!< Access FCSPI DATA register and Tx/Rx buffer by half word */
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FCSPI_DATA_ACCESS_32_BIT = 0X2U /*!< Access FCSPI DATA register and Tx/Rx buffer by word */
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} FCSPI_DataAccessWidthType;
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/**
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* @brief Configuration item: The user chooses what strategy to use for the chip selection signal(PCS).
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*
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*/
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typedef enum {
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FCSPI_PCS_HARDWARE_SEL = 0x0U, /*!< PCS(CS,Chip Selecl) is automatically controlled by the FCSPI peripheral hardware. */
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FCSPI_PCS_GPIO_SEL = 0x1U, /*!< User will chose a GPIO pin and manually change its level high and low
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to simulate the PCS. */
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FCSPI_PCS_NONE = 0x2U /*!< No need PCS. */
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} FCSPI_PcsModeType;
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typedef enum{
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/* Indicates that the user wants the actual clock frequency to be
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as close as possible to the configured value(Config.SckFreq)
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In this case, the duty cycle of the SCK signal wave may not be 50%. */
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FCSPI_SCK_FEATURE_PRECISE_FREQ = 0x0,
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/* Indicates that the user expects that the duty cycle of the SCK signal must be 50%.
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In this case, the error between the actual SCK frequency and the configured value may be greater.*/
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FCSPI_SCK_FEATURE_50_DUTY_CYCLE = 0x1,
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} FCSPI_SckFeature;
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/**
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* @brief The structure of the FCSPI processing handle
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*
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*/
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typedef struct _FCSPI_HandleType
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{
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FCSPI_InstanceType eInstance; /**< FCSPIn base address */
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struct
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{
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FCSPI_MasterSlaveModeType Mode; /**< Master or Slave mode */
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uint32_t SckFreq; /**< Desired Frequency of 'SCK' */
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FCSPI_SckPolarityType SckPolarity; /**< SCK polarity */
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FCSPI_SckPhaseType SckPhase; /**< SCK phase */
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FCSPI_SckFeature SckFeature; /**< Whether the duty cycle of 'SCK' is required to be 50% or not */
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FCSPI_PcsModeType PcsMode; /**< PCS is controled by FCSPI hardware or user control GPIO pin to simulate PCS */
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bool PcsContinuousEnable; /**< Whether 'PCS' is continuous in a transfer API service */
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struct
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{
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FCSPI_PcsSelType PCSn; /**< Select from FCSPIn_PCS0 ~ FCSPIn_PCS3 */
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FCSPI_PcsPolarityType PcsPolarity; /**< Pcs Polarity */
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} HardwareSelect;
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uint32_t FrameSize; /**< Bit count of one frame */
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FCSPI_DataFirstBitType BitOrder; /**< MSB or LSB */
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FCSPI_TransferWidthType TransferWidth; /**< Transfer width */
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uint32_t TxFifoWatermark; /**< Tx FIFO watermark */
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uint32_t RxFifoWatermark; /**< Rx FIFO watermark */
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FCSPI_PinConfigType PinConfig; /**< Configuration about 'SIN' and 'SOUT' pin */
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bool SckLoopbackEnable; /**< Sck loopback enable or not */
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bool InternalPcsEnable; /**< Internal PCS enable or not, only valid on slave mode */
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bool ByteSwapEnable; /**< Byte Swap enable or not */
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uint32_t DelayPCS2SCK; /**< This configuration item is a multiple:
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How many times of
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the time interval between the PCS signal assert to the first edge of SCK
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is one cycle of SCK. */
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uint32_t DelayPCS2PCS; /**< This configuration item is a multiple:
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How many times of
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the time interval between the PCS signal de-assert to the next frame PCS assert
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is one cycle of SCK. */
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uint32_t DelaySCK2PCS; /**< This configuration item is a multiple:
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How many times of
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the time interval between the last edge of SCK to the PCS de-assert
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is one cycle of SCK. */
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void (*TansferStartNotification)(struct _FCSPI_HandleType *pFcspiHandle); /**< callback to notify that transfer starts,only valid in non-blocking API service */
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void (*TansferEndNotification)(struct _FCSPI_HandleType *pFcspiHandle); /**< callback to notify that transfer completes,only valid in non-blocking API service */
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} Config;
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/**
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* @brief FCSPI driver inner status
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* tStatus must not be set by user
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*
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*/
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struct
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{
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volatile FCSPI_StateType state;
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uint32_t TR_CTRL; /**< The current TR_CTRL value of SPI Instance */
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FCSPI_DataAccessWidthType eAccessWidth;
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uint8_t *TxBuff;
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uint32_t TxSize; /**< Bytes count of all send data.It is a reference value that usually does not change during transmission */
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uint32_t TxCnt; /**< Bytes count of data that has been writen into TX FIFO.It is a state value that changes as the transfer progresses */
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void (*TxIsr)(struct _FCSPI_HandleType *pFcspiHandle); /*!< function pointer for Tx ISR */
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uint8_t *RxBuff;
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uint32_t RxSize; /**< Bytes count of all receive data.It is a reference value that usually does not change during transmission*/
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uint32_t RxCnt; /**< Bytes count of data that has been read from RX FIFO,It is a state value that changes as the transfer progresses */
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void (*RxIsr)(struct _FCSPI_HandleType *pFcspiHandle); /*!< function pointer for Rx ISR */
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} tStatus;
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} FCSPI_HandleType;
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uint32_t FCSPI_LL_CaculateSckdivPrescale(uint32_t *Prescale, uint32_t *Sckdiv, uint32_t InputClkFreq, uint32_t TargetSckFreq);
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/**
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* @brief Initialize FCSPI based on configurations in FCSPI_HandleType
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Init(FCSPI_HandleType *pFcspiHandle);
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/**
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* @brief De-init FCSPI peripheral and 'tStatus' of FCSPI_HandleType structure
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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*
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* @return void
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*/
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void FCSPI_DeInit(FCSPI_HandleType *pFcspiHandle);
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/**
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* @brief Transmit data in blocking(polling) mode.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pData pointer to Tx data buffer.
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* @param Size Bytes count of data to be transmitted.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Transmit(FCSPI_HandleType *pFcspiHandle, uint8_t *pData, uint32_t Size);
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/**
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* @brief Receive data in blocking(polling) mode.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Receive(FCSPI_HandleType *pFcspiHandle, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief Transmit and receive data in blocking(polling) mode.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pTxData pointer to Tx data buffer.
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be transmitted and received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_TransmitReceive(FCSPI_HandleType *pFcspiHandle, uint8_t *pTxData, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief Transmit data in interrupt mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pTxData pointer to Tx data buffer.
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* @param Size Bytes count of data to be transmitted.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Transmit_IT(FCSPI_HandleType *pFcspiHandle, uint8_t *pTxData, uint32_t Size);
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/**
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* @brief Receive data in interrupt mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Receive_IT(FCSPI_HandleType *pFcspiHandle, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief Transmit and receive data in interrupt mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pTxData pointer to Tx data buffer.
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be transmitted and received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_TransmitReceive_IT(FCSPI_HandleType *pFcspiHandle, uint8_t *pTxData, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief Transmit data in DMA mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pTxData pointer to Tx data buffer.
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* @param Size Bytes count of data to be transmitted.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Transmit_DMA(FCSPI_HandleType *pFcspiHandle, uint8_t *pTxData, uint32_t Size);
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/**
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* @brief Receive data in DMA mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_Receive_DMA(FCSPI_HandleType *pFcspiHandle, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief Transmit and receive data in DMA mode(non-blocking).
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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* @param pTxData pointer to Tx data buffer.
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* @param pRxData pointer to Rx data buffer.
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* @param Size Bytes count of data to be transmitted and received.
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*
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* @return FCSPI_StatusType
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*/
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FCSPI_StatusType FCSPI_TransmitReceive_DMA(FCSPI_HandleType *pFcspiHandle, uint8_t *pTxData, uint8_t *pRxData, uint32_t Size);
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/**
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* @brief The internal interrupt handler function for FCSPI instances.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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*/
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void FCSPIn_IRQHandler(FCSPI_HandleType *pFcspiHandle);
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/**
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* @brief FCSPI callback of DMA channel triggered by Tx FIFO.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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*/
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void FCSPIn_DmaDoneCallback_Tx(void *pFcspiHandle);
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/**
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* @brief FCSPI callback of DMA channel triggered by Rx FIFO.
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*
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* @param pFcspiHandle pointer to a FCSPI_HandleType structure
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*/
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void FCSPIn_DmaDoneCallback_Rx(void *pFcspiHandle);
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#if defined(__cplusplus)
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}
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#endif
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/** @}*/
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#endif
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#endif /* _DRIVER_MODULE_DRIVER_FCSPI_H_ */
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