172 lines
5.0 KiB
C
172 lines
5.0 KiB
C
/**
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* @file module_driver_csc.h
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* @author flagchip
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* @brief csc driver type definition and API
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* @version 2.0.0
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* @date 2024-08-20
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*
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* SDK Version: 2.6.0
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*
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* @copyright Copyright (c) 2020-2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2023-12-15 Flagchip055 N/A First version for FC7300
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* 2.0.0 2024-10-12 Flagchip055 N/A Change version and release
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******************************************************************************** */
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#ifndef _DRIVER_MODULE_DRIVER_CSC_H_
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#define _DRIVER_MODULE_DRIVER_CSC_H_
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#include "HwA_csc.h"
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#if CSC0_INSTANCE_COUNT > 0U
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/**
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* @addtogroup module_driver_csc
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* @{
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*/
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/********* Dev Error Report ************/
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#ifndef CSC0_DEV_ERROR_REPORT
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#define CSC0_DEV_ERROR_REPORT STD_OFF
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#endif
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#if CSC0_DEV_ERROR_REPORT == STD_ON
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#define CSC0_ReportDevError(func, error) ReportDevError(CSC0_MODULE_ID, func, error)
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#endif
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/**
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* @name CSC0 API Service IDs
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* @{
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*/
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#define CSC0_SET_CLOCK_OUT_ID 0x00U
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#define CSC0_SET_AONCLKSRC_ID 0x01U
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#define CSC0_GET_CLOCK_FREQ_ID 0x02U
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/** @}*/
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/**
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* @name CSC0 Dev Error Code
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* @brief Error Code of calling CSC0 apis
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* @{
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*/
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#define CSC0_E_PARAM_POINTER 0x01U
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#define CSC0_E_PARAM_OUT_RANGE 0x02U
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/** @}*/
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/********* Local defines ************/
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#define CSC0_AONCLK_128K 128000U
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#define CSC0_AONCLK_32K 32000U
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#define CSC0_AONCLK_SOSC_32K 32768U
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#define CSC0_AONCLK_1K 1000U
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/********* Local typedef ************/
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/**
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* @brief Indicate the clock status for each clock source in clock tree list
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*
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*/
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typedef enum
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{
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CSC0_CLOCK_UNDEFINE = 0U, /*!< Clock status undefined from power on */
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CSC0_CLOCK_DISABLE = 1U, /*!< clock source set as disabled */
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CSC0_CLOCK_VALID = 2U, /*!< clock set succeed */
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CSC0_CLOCK_ERROR = 3U, /*!< clock set failed */
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CSC0_CLOCK_UNKNOWN = 4U
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} CSC0_ClockStatusDef;
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/**
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* @brief CSC0 clock source type for clock infomation querry
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*
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*/
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typedef enum
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{
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CSC0_AON32K_CLK = 0U, /*!< AON32K_CLK */
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CSC0_RTC_CLK = 1U, /*!< RTC_CLK */
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CSC0_AON_CLK = 2U, /*!< AON_CLK */
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CSC0_CLKOUT_CLK = 3U, /*!< CLKOUT_CLK */
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CSC0_END_OF_CLOCKS = 4U /*!< End of CSC0 clocks */
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} CSC0_ClkSrcType;
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/**
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* @brief CSC return status
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*
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*/
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typedef enum
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{
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CSC_E_OK = 0U, /*!< Return ok */
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CSC_E_NOT_OK /*!< Return not ok */
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} CSC_RetStatusType;
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/**
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* @brief Data type for register CSC0_CLKOUT_CTRL,mainly focus on CLKOUT setting
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*
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*/
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typedef struct
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{
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bool bEnable; /*!< CSC0 ClockOut enable */
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CSC0_ClockOutSrcType eClkOutSrc; /*!< CSC0 ClockOut source select */
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CSC0_ClockOutDivType eDivider; /*!< CSC0 ClockOut divide ratio */
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} CSC0_ClkoutType;
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/**
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* @brief CSC0_AONCLKSR clock source info
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*
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*/
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typedef struct
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{
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CSC0_AON32KClkSrcType eAon32KSel; /*!< CSC0 32 KHz Always-on Clock Source Select */
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CSC0_RTCClkSrcType eRtcSel; /*!< CSC0 RTC Clock Source Select */
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CSC0_AONClkSrcType eAonSel; /*!< CSC0 AON Clock Source Select */
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} CSC0_AONCLKSRType;
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/********* Local function ************/
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#if CSC0_CLOCKCONFIG_SUPPORT
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/**
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* @brief set clock out. with clock out pin configure, the clock would be monitored.
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* This Function may combined with SCG_ClkOut setting
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* need to call SCG_SetClkOut,if clock out source set to SCG_CLKOUT. *
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* @param pCsc0ClkOut to Csc0ClkOut instance for clock out configuration
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* @param bLockStatus to lock current register
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*
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* @return Set clock out operation success/failed
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* @note configuration sequence:
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* 1. Disable CLKOUTEN
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* 2. Set CLKOUTSEL
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* 3. Enable CLKOUTEN
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*/
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CSC_RetStatusType CSC0_SetClockOut(const CSC0_ClkoutType *const pCsc0ClkOut, bool bLockStatus);
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/**
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* @brief set always on clock source configuration include AON32K, RTC, AONCLK clock.
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*
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* @param pAonclkSrcType pointer to AONCLKSR instance for AON clock source configuration
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* @param bLockStatus to lock current register
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*
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* @return Set clock out operation success/failed
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*/
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CSC_RetStatusType CSC0_SetAonClkSrc(const CSC0_AONCLKSRType *const pAonclkSrcType, bool bLockStatus);
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/**
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* @brief Report the clock source status and frequency configured in MCU run time.
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* The clock frequency and status would change by clock set function.
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*
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* @param eClkkName: the CSC0 clock source to query
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* @param pFreq: frequency variable point to get the frequency value
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* @return true or false. This indicate the clock source status invalid or request clock source out of
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* range.
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*/
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CSC_RetStatusType CSC0_GetCSC0ClockFreq(const CSC0_ClkSrcType eClkkName, uint32_t *const pFreq);
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#endif /* CSC0_CLOCKCONFIG_SUPPORT */
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/** @}*/
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#endif /* #if CSC0_INSTANCE_COUNT > 0U */
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#endif /* End of _DRIVER_MODULE_DRIVER_CSC_H_ */
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