/** * @file module_driver_tpu.c * @author Flagchip099 * @brief FC7xxx TPU driver source code * @version 2.0.0 * @date 2024-1-12 * * SDK Version: 2.6.0 * * @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd. * */ /* ******************************************************************************** * Revision History: * * Version Date Initials CR# Descriptions * --------- ---------- ------------ ---------- --------------- * 0.1.0 2024-1-12 Flagchip099 N/A First version for FC7240 ******************************************************************************** */ #include "module_driver_tpu.h" #if (TPU_INSTANCE_COUNT > 0) void TPU0_CH0_7_IRQHandler(void); void TPU0_CH8_15_IRQHandler(void); void TPU0_CH16_23_IRQHandler(void); void TPU0_CH24_31_IRQHandler(void); /** * @brief TPU_Overflow_IRQHandler * */ void TPU_Overflow_IRQHandler(TPU_InstanceHandleType* pTpuInstanceHandle) { TPU_E_Type *const pTpuE = TPU_E_BASE_PTRS; if (TPU_E_HWA_GetTCR1Overflow(pTpuE)) { TPU_E_HWA_ClearTCR1Overflow(pTpuE); if (pTpuInstanceHandle->tSettings.callback.pTPU_TCR1OverFlowCallback != NULL) { pTpuInstanceHandle->tSettings.callback.pTPU_TCR1OverFlowCallback(pTpuInstanceHandle->tSettings.callback.pTCR1OVFdata); } } if (TPU_E_HWA_GetTCR2Overflow(pTpuE)) { TPU_E_HWA_ClearTCR2Overflow(pTpuE); if (pTpuInstanceHandle->tSettings.callback.pTPU_TCR2OverFlowCallback != NULL) { pTpuInstanceHandle->tSettings.callback.pTPU_TCR2OverFlowCallback(pTpuInstanceHandle->tSettings.callback.pTCR2OVFdata); } } } /** * @brief TPU_Event_IRQHandler * */ void TPU_Event_IRQHandler(TPU_InstanceHandleType* pTpuInstanceHandle, uint8_t u8MinChannel, uint8_t u8MaxChannel) { TPU_H_Type *const pTpuH = TPU_H_BASE_PTRS; uint8_t u8Channel; for (u8Channel = (uint8_t)u8MinChannel; u8Channel < ((uint8_t)u8MaxChannel + 1u); u8Channel++) { if (TPU_H_HWA_GetChEventTrigISRStatus(pTpuH, u8Channel) == true) { if (pTpuInstanceHandle->tSettings.callback.pTPU_EventCallback[u8Channel] != NULL) { pTpuInstanceHandle->tSettings.callback.pTPU_EventCallback[u8Channel](pTpuInstanceHandle->tSettings.callback.pEventdata); } } if (TPU_H_HWA_GetChHSAReqStatus(pTpuH, u8Channel) == true) { TPU_H_HWA_ClearChHSA(pTpuH, u8Channel); if (pTpuInstanceHandle->tSettings.callback.pTPU_HSACallback[u8Channel] != NULL) { pTpuInstanceHandle->tSettings.callback.pTPU_HSACallback[u8Channel](pTpuInstanceHandle->tSettings.callback.pHSAdata); } } } } /** * @brief TPU_InitOverflowInterrupt * */ static void TPU_InitOverflowInterrupt(TPU_InstanceHandleType* pTpuInstanceHandle, const TPU_InterruptCfgType *const pInterruptCfg) { DEV_ASSERT(pInterruptCfg != NULL); TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; if (pInterruptCfg->bTCR1OverFlowEventIntEn) { pTpuInstanceHandle->tSettings.callback.pTPU_TCR1OverFlowCallback = pInterruptCfg->pTCR1OverflowNotify; pTpuInstanceHandle->tSettings.callback.pTCR1OVFdata = pInterruptCfg->pTCR1OVFdata; TPU_E_HWA_EnableTCR1OVFIRQ(pTPUE, (bool)true); } else { TPU_E_HWA_EnableTCR1OVFIRQ(pTPUE, (bool)false); pTpuInstanceHandle->tSettings.callback.pTPU_TCR1OverFlowCallback = NULL; } if (pInterruptCfg->bTCR2OverFlowEventIntEn) { pTpuInstanceHandle->tSettings.callback.pTPU_TCR2OverFlowCallback = pInterruptCfg->pTCR2OverflowNotify; pTpuInstanceHandle->tSettings.callback.pTCR2OVFdata = pInterruptCfg->pTCR2OVFdata; TPU_E_HWA_EnableTCR2OVFIRQ(pTPUE, (bool)true); } else { TPU_E_HWA_EnableTCR2OVFIRQ(pTPUE, (bool)false); pTpuInstanceHandle->tSettings.callback.pTPU_TCR2OverFlowCallback = NULL; } } /** * @brief TPU_InitChannelInterrupt * */ void TPU_InitChannelInterrupt(TPU_InstanceHandleType* pTpuInstanceHandle, TPU_HandleType* pTpuHandle, const TPU_InterruptCfgType *const pInterruptCfg) { DEV_ASSERT(pTpuHandle->tSettings.u8Channel < TPU_E_CH_COUNT); DEV_ASSERT(pInterruptCfg != NULL); TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; if (pInterruptCfg->bEventIntEn) { pTpuInstanceHandle->tSettings.callback.pTPU_EventCallback[u8Channel] = pInterruptCfg->pEventNotify; pTpuInstanceHandle->tSettings.callback.pEventdata[u8Channel] = pInterruptCfg->pEventdata; TPU_E_HWA_EnableChEventInt(pTPUE, u8Channel, (bool)true); TPU_E_HWA_EnableSrvReq(pTPUE, u8Channel, (bool)true); TPU_H_HWA_SetChTrig(pTPUH, u8Channel, pInterruptCfg->eChTrigType); } else { pTpuInstanceHandle->tSettings.callback.pTPU_EventCallback[u8Channel] = NULL; } TPU_InitOverflowInterrupt(pTpuInstanceHandle, pInterruptCfg); } /** * @brief TPU_Init * */ void TPU_Init(void) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; SCM_HWA_SUBSYS_PCC_SetEnable_TPUClock((bool)true); TPU_E_HWA_SetTimeBaseCntStopInStopMode(pTPUE, (bool)true); } /** * @brief TPU_DeInit * */ void TPU_DeInit(void) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; TPU_E_HWA_TrigReset(pTPUE); } /** * @brief TPU_StartChannel * */ void TPU_StartChannel(void) { SCM_HWA_ConfigTpuGTBSelect((bool)true); } /** * @brief TPU_SetHSR * */ void TPU_SetHSR(TPU_HandleType* pTpuHandle, uint8_t u8HSRIdx) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; TPU_H_HWA_SetChHSA(pTPUH, u8channel, true); TPU_H_HWA_SetChHSRIdx(pTPUH, u8channel, u8HSRIdx); TPU_H_HWA_SetChSyncISR(pTPUH, u8channel, (bool)false); } /** * @brief TPU_SendHSR * */ void TPU_SendHSR(TPU_HandleType* pTpuHandle) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; TPU_H_HWA_ClearChHSR(pTPUH, u8channel); } /** * @brief TPU_GetHSA * */ uint8_t TPU_GetHSA(TPU_HandleType* pTpuHandle) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; return TPU_H_HWA_GetChHSAIdx(pTPUH, (uint8_t)u8Channel); } /** * @brief TPU_InitChannelInterrupt * */ void TPU_InitChannelHSAInterrupt(TPU_InstanceHandleType* pTpuInstanceHandle, TPU_HandleType* pTpuHandle, const TPU_InterruptCfgType *const pInterruptCfg) { uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; pTpuInstanceHandle->tSettings.callback.pTPU_HSACallback[u8Channel] = pInterruptCfg->pHSANotify; pTpuInstanceHandle->tSettings.callback.pHSAdata[u8Channel] = pInterruptCfg->pHSAdata; } /** * @brief TPU_EnableSubSystem * */ void TPU_EnableSubSystem(void) { SCM_HWA_SUBSYS_PCC_SetEnable_SubSystemClock((bool)true); } /** * @brief TPU_EnableEventTrigDma * */ void TPU_EnableEventTrigDma(TPU_HandleType* pTpuHandle) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; TPU_H_HWA_SetChEventDMAEnable(pTPUH, (uint8_t)u8Channel, (bool)true); } void TPU_EnableEventTrigTrgSel(TPU_HandleType* pTpuHandle, const TPU_InterruptCfgType *const pInterruptCfg) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; TPU_H_HWA_SetChTrig(pTPUH, u8Channel, pInterruptCfg->eChTrigType); } /** * @brief TPU_EnableFlexcoreTrigDma * */ void TPU_EnableFlexcoreTrigDma(TPU_HandleType* pTpuHandle) { TPU_H_Type *const pTPUH = TPU_H_BASE_PTRS; uint8_t u8Channel = pTpuHandle->tSettings.u8Channel; TPU_H_HWA_SetChReqDMAEnable(pTPUH, (uint8_t)u8Channel, (bool)true); } /** * @brief TPU_PwmModeInit * */ void TPU_PwmModeInit(TPU_HandleType* pTpuHandle, const TPU_PwmCfgType *const p_etpu_config) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; uint32_t u32ER1_Val; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; pTpuHandle->tSettings.pPwmcfg = (TPU_PwmCfgType *)p_etpu_config; TPU_E_HWA_ClearMatch1CFGFlg(pTPUE, u8channel); TPU_E_HWA_ClearMatch1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearMatch2CFGFlg(pTPUE, u8channel); TPU_E_HWA_ClearMatch2Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect2Event(pTPUE, u8channel); TPU_E_HWA_SetOPAC1(pTPUE, u8channel, TPUE_NO_CHANGE_OUTPUT); TPU_E_HWA_SetOPAC2(pTPUE, u8channel, TPUE_NO_CHANGE_OUTPUT); TPU_E_HWA_SetTCR1ClkControl(pTPUE, TPUE_TCR1CLK_CLK_SRC_TPUCLKDIV2); TPU_E_HWA_SetPDCM(pTPUE, u8channel, TPUE_EM_NB_ST); TPU_E_HWA_SetTCR1MaxCnt(pTPUE, TPU_TCR1_MAXVALUE); TPU_E_HWA_SetTCR2MaxCnt(pTPUE, TPU_TCR1_MAXVALUE); if (p_etpu_config->bPwmUseTCR1) { TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (TPU_E_HWA_GetTCR1CntVal(pTPUE) + 1U)); u32ER1_Val = TPU_E_HWA_GetER1Val(pTPUE, u8channel); TPU_E_HWA_SetER2(pTPUE, u8channel, (p_etpu_config->u32ActiveTime + u32ER1_Val)); } pTpuHandle->tStatus.u32PwmNextEdge = TPU_E_HWA_GetER2Val(pTPUE, u8channel); TPU_E_HWA_SetChOutputActiveHigh(pTPUE, u8channel, p_etpu_config->bActiveHigh); if (p_etpu_config->bActiveHigh) { TPU_E_HWA_SetOPAC1(pTPUE, u8channel, TPUE_MATCH_SET_OUTPUT_HIGH); TPU_E_HWA_SetOPAC2(pTPUE, u8channel, TPUE_MATCH_SET_OUTPUT_LOW); TPU_E_HWA_SetChTBS1(pTPUE, u8channel, p_etpu_config->eTBS1); TPU_E_HWA_SetChTBS2(pTPUE, u8channel, p_etpu_config->eTBS2); TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)true); } else { TPU_E_HWA_SetOPAC1(pTPUE, u8channel, TPUE_MATCH_SET_OUTPUT_LOW); TPU_E_HWA_SetOPAC2(pTPUE, u8channel, TPUE_MATCH_SET_OUTPUT_HIGH); TPU_E_HWA_SetChTBS1(pTPUE, u8channel, p_etpu_config->eTBS1); TPU_E_HWA_SetChTBS2(pTPUE, u8channel, p_etpu_config->eTBS2); TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)false); } /* Set channel priority */ /* Here do not enable NVIC */ #ifdef TPU_E_CHn_OCR_OUT_OP1_MASK TPU_E_HWA_SetOutputSelOPAC1(pTPUE, u8channel, (bool)true); TPU_E_HWA_SetOutputSelOPAC2(pTPUE, u8channel, (bool)true); #endif TPU_E_HWA_EnableChOutputBuf(pTPUE, u8channel, (bool)true); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); TPU_E_HWA_EnableSrvReq(pTPUE, u8channel, (bool)true); return; } /** * @brief TPU_PwmServiceReq * */ void TPU_PwmServiceReq(TPU_HandleType* pTpuHandle, uint32_t u32ActiveTime, uint32_t u32Period) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; if (TPU_E_HWA_GetChMatchRecLatch1Status(pTPUE, u8channel) == (bool)true) { /* in match1 */ TPU_E_HWA_ClearMatch1Event(pTPUE, u8channel); TPU_E_HWA_SetChEntryTblflag0(pTPUE, u8channel, (bool)false); pTpuHandle->tStatus.u32PwmLastFrame = TPU_E_HWA_GetER1Val(pTPUE, u8channel); /* Next ER1 */ if ((pTpuHandle->tStatus.u32PwmLastFrame + u32Period) > TPU_TCR1_MAXVALUE) { TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (pTpuHandle->tStatus.u32PwmLastFrame + u32Period - TPU_TCR1_MAXVALUE - 1U)); } else { TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (pTpuHandle->tStatus.u32PwmLastFrame + u32Period)); } if ((TPU_E_HWA_GetER1Val(pTPUE, u8channel) + u32ActiveTime) > TPU_TCR1_MAXVALUE) { pTpuHandle->tStatus.u32PwmNextEdge = TPU_E_HWA_GetER1Val(pTPUE, u8channel) + u32ActiveTime - TPU_TCR1_MAXVALUE - 1U; } else { pTpuHandle->tStatus.u32PwmNextEdge = TPU_E_HWA_GetER1Val(pTPUE, u8channel) + u32ActiveTime; } TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); } else if (TPU_E_HWA_GetChMatchRecLatch2Status(pTPUE, u8channel) == (bool)true) { /* in match2 */ TPU_E_HWA_ClearMatch2Event(pTPUE, u8channel); TPU_E_HWA_SetChEntryTblflag0(pTPUE, u8channel, (bool)true); /* Next ER2 */ TPU_E_HWA_SetER2(pTPUE, u8channel, pTpuHandle->tStatus.u32PwmNextEdge); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); } TPU_E_HWA_ClearChEventISRFlg(pTPUE, (uint8_t)u8channel); } /** * @brief TPU_CaptureModeInit * */ void TPU_CaptureModeInit(TPU_HandleType* pTpuHandle, const TPU_CaptureCfgType *const p_etpu_config) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; pTpuHandle->tSettings.pCapcfg = (TPU_CaptureCfgType*)p_etpu_config; pTpuHandle->tStatus.bMeasActivePeriodComplete = (bool)false; TPU_E_HWA_ClearMatchEn1(pTPUE, u8channel); TPU_E_HWA_ClearMatch1CFGFlg(pTPUE, u8channel); TPU_E_HWA_ClearMatch1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearMatch2CFGFlg(pTPUE, u8channel); TPU_E_HWA_ClearMatch2Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect2Event(pTPUE, u8channel); TPU_E_HWA_SetTCR1ClkControl(pTPUE, TPUE_TCR1CLK_CLK_SRC_TPUCLKDIV2); TPU_E_HWA_SetChTBS1(pTPUE, u8channel, TPUE_GREATER_OR_EQUAL_CAPBASE_TCR1_MATCHBASE_TCR1); TPU_E_HWA_SetChTBS2(pTPUE, u8channel, TPUE_GREATER_OR_EQUAL_CAPBASE_TCR1_MATCHBASE_TCR1); TPU_E_HWA_SetOPAC1(pTPUE, u8channel, TPUE_NO_CHANGE_OUTPUT); TPU_E_HWA_SetOPAC2(pTPUE, u8channel, TPUE_NO_CHANGE_OUTPUT); TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)false); TPU_E_HWA_SetChEntryTblflag0(pTPUE, u8channel, (bool)false); TPU_E_HWA_SetTCR1MaxCnt(pTPUE, TPU_TCR1_MAXVALUE); TPU_E_HWA_SetTCR2MaxCnt(pTPUE, TPU_TCR1_MAXVALUE); if (p_etpu_config->eMeasureMode == TPU_DutyMeasurementActiveHigh) { TPU_E_HWA_SetPDCM(pTPUE, u8channel, TPUE_SM_DT); TPU_E_HWA_SetIPAC1(pTPUE, u8channel, TPUE_DETECT_RISING_EDGE_ONLY); TPU_E_HWA_SetIPAC2(pTPUE, u8channel, TPUE_DETECT_FALLING_EDGE_ONLY); } else if (p_etpu_config->eMeasureMode == TPU_DutyMeasurementActiveLow) { TPU_E_HWA_SetPDCM(pTPUE, u8channel, TPUE_SM_DT); TPU_E_HWA_SetIPAC1(pTPUE, u8channel, TPUE_DETECT_FALLING_EDGE_ONLY); TPU_E_HWA_SetIPAC2(pTPUE, u8channel, TPUE_DETECT_RISING_EDGE_ONLY); } else if (p_etpu_config->eMeasureMode == TPU_PeriodMeasurement) { TPU_E_HWA_SetPDCM(pTPUE, u8channel, TPUE_SM_ST); TPU_E_HWA_SetIPAC1(pTPUE, u8channel, p_etpu_config->eInputType); TPU_E_HWA_SetIPAC2(pTPUE, u8channel, TPUE_NO_TRANSITIONS); } else { /* do nothing */ } TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (TPU_E_HWA_GetTCR1CntVal(pTPUE) + p_etpu_config->u32SampleTime)); TPU_E_HWA_EnableTransContinue(pTPUE, u8channel, (bool)true); /* Here not set channel priority */ /* Here not enable NVIC */ TPU_E_HWA_EnableChEventInt(pTPUE, u8channel, (bool)true); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); TPU_E_HWA_EnableSrvReq(pTPUE, u8channel, (bool)true); return; } /** * @brief TPU_CaptureMeasPeriodServiceReq * */ void TPU_CaptureMeasPeriodServiceReq(TPU_HandleType* pTpuHandle, TPU_CaptureCfgType *p_etpu_config) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; volatile bool bMeasurement = TPU_E_HWA_GetChEntryTblflag1(pTPUE, u8channel); if (TPU_E_HWA_GetChMatchRecLatch1Status(pTPUE, u8channel) == (bool)true) { TPU_E_HWA_ClearMatch1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect2Event(pTPUE, u8channel); p_etpu_config->LastTime = TPU_E_HWA_GetER1Val(pTPUE, u8channel); TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (p_etpu_config->LastTime + p_etpu_config->u32SampleTime)); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); TPU_E_HWA_ClearChEventISRFlg(pTPUE, (uint8_t)u8channel); TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)false); p_etpu_config->u32PeriodTime = 0; } else if (TPU_E_HWA_GetChTransDetectLatch1Status(pTPUE, u8channel) == (bool)true) { TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearChEventISRFlg(pTPUE, (uint8_t)u8channel); /* transition happened */ if (bMeasurement) { /* Complete once normal measurement */ if (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) >= p_etpu_config->LastTime) { p_etpu_config->u32PeriodTime = (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) - p_etpu_config->LastTime); } else { p_etpu_config->u32PeriodTime = (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) + TPU_TCR1_MAXVALUE - p_etpu_config->LastTime + 1U); } TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)false); } /* Start normal measurement */ p_etpu_config->LastTime = TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel); TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (p_etpu_config->LastTime + p_etpu_config->u32SampleTime)); /* bMeasurement = active */ TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); TPU_E_HWA_SetChEntryTblflag1(pTPUE, u8channel, (bool)true); } } /** * @brief TPU_CaptureMeasActiveLowServiceReq * */ void TPU_CaptureMeasActivePeriodServiceReq(TPU_HandleType* pTpuHandle, TPU_CaptureCfgType *p_etpu_config) { TPU_E_Type *const pTPUE = TPU_E_BASE_PTRS; uint8_t u8channel = pTpuHandle->tSettings.u8Channel; if (TPU_E_HWA_GetChMatchRecLatch1Status(pTPUE, u8channel) == (bool)true) { TPU_E_HWA_ClearMatch1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect2Event(pTPUE, u8channel); p_etpu_config->LastTime = TPU_E_HWA_GetER1Val(pTPUE, u8channel); TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (p_etpu_config->LastTime + p_etpu_config->u32SampleTime)); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); TPU_E_HWA_ClearChEventISRFlg(pTPUE, (uint8_t)u8channel); p_etpu_config->u32PeriodTime = 0; p_etpu_config->u32ActiveTime = 0; pTpuHandle->tStatus.bMeasActivePeriodComplete = (bool)false; } else if ((TPU_E_HWA_GetChTransDetectLatch1Status(pTPUE, u8channel) == (bool)true) || (TPU_E_HWA_GetChTransDetectLatch2Status(pTPUE, u8channel) == (bool)true)) { /* transition1 or 2 happened */ TPU_E_HWA_ClearTransDetect1Event(pTPUE, u8channel); TPU_E_HWA_ClearTransDetect2Event(pTPUE, u8channel); TPU_E_HWA_ClearChEventISRFlg(pTPUE, (uint8_t)u8channel); /* ER1 stores TCR1 in IPAC1 edge */ /* Here calculate period */ if (pTpuHandle->tStatus.bMeasActivePeriodComplete) { /* Complete once normal measurement */ if (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) >= p_etpu_config->StartTime) { p_etpu_config->u32PeriodTime = (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) - p_etpu_config->StartTime); } else { p_etpu_config->u32PeriodTime = (TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel) + TPU_TCR1_MAXVALUE - p_etpu_config->StartTime + 1); } /* MeasurementComplete = inactive */ pTpuHandle->tStatus.bMeasActivePeriodComplete = (bool)false; } /* Start normal low measurement */ p_etpu_config->LastTime = TPU_E_HWA_GetCaptureER1Val(pTPUE, u8channel); p_etpu_config->StartTime = p_etpu_config->LastTime; /* ER2 stores TCR1 in IPAC2 edge */ /* Complete once normal measurement */ if (TPU_E_HWA_GetCaptureER2Val(pTPUE, u8channel) >= p_etpu_config->LastTime) { p_etpu_config->u32ActiveTime = (TPU_E_HWA_GetCaptureER2Val(pTPUE, u8channel) - p_etpu_config->LastTime); } else { p_etpu_config->u32ActiveTime = (TPU_E_HWA_GetCaptureER2Val(pTPUE, u8channel) + TPU_TCR1_MAXVALUE - p_etpu_config->LastTime + 1); } /* MeasurementComplete = active */ pTpuHandle->tStatus.bMeasActivePeriodComplete = (bool)true; /* Waiting for first IPAC1 edge */ p_etpu_config->LastTime = TPU_E_HWA_GetCaptureER2Val(pTPUE, u8channel); TPU_E_HWA_SetMatchER1(pTPUE, u8channel, (p_etpu_config->LastTime + p_etpu_config->u32SampleTime)); TPU_E_HWA_EnableMatch(pTPUE, u8channel, (bool)true); } } #endif