595 lines
24 KiB
C
595 lines
24 KiB
C
/**
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* @file fc7xxx_driver_csc.h
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* @author Flagchip085
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* @brief FC7xxx csc driver type definition and API
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* @version 0.1.0
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* @date 2024-01-12
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-12 Flagchip085 N/A First version for FC7240
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********************************************************************************/
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#ifndef _DRIVER_FC7XXX_DRIVER_CSC_H_
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#define _DRIVER_FC7XXX_DRIVER_CSC_H_
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#include "HwA_csc.h"
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/********* Local defines ************/
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#define CSC0_AONCLK_128K 128000U
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#define CSC0_AONCLK_32K 32000U
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#define CSC0_AONCLK_SOSC_32K 32768U
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#define CSC0_AONCLK_1K 1000U
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/********* Local typedef ************/
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/**
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* @brief Stop ack status type
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*
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*/
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typedef enum
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{
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STOPMODE_PROCESSS = 0U, /*!< The peripheral is processing(not in stop mode) */
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STOPMODE_READY = 1U /*!< The peripheral is already in stop mode*/
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} CSC_StopModeStatusType;
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/**
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* @brief CSC return status
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*
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*/
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typedef enum
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{
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CSC_E_OK = 0U, /*!< Return ok */
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CSC_E_NOT_OK, /*!< Return not ok */
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CSC_E_LOCK, /*!< Return error because the register is locked */
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CSC_E_NO_PERM, /*!< Return error because the CPU has no permission */
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CSC_E_PARAM /*!< Return error because the parameter is invalid */
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} CSC_RetStatusType;
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/**
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* @brief CSC setting target
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*
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*/
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typedef enum
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{
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CSC_STOPACK = 0U, /*!< stop ack */
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CSC_STOPREQ /*!< stop request */
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} CSC_SetTargetType;
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/**
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* @brief CSC stop mode/ack/request control group info
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* @note Must match with peripheal enum
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*/
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typedef enum
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{
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CSC_STOP_CTRL_GROUP_0 = 0U, /*!< CSC stop mode/ack/request control group 0 */
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CSC_STOP_CTRL_GROUP_1, /*!< CSC stop mode/ack/request control group 1 */
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CSC_STOP_CTRL_GROUP_2, /*!< CSC stop mode/ack/request control group 2 */
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} CSC_PeriphGrpType;
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/**
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* @brief CSC0_AONCLKSR clock source info
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*
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*/
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typedef struct
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{
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bool HclkEn; /*!< CPUx HCLOCK Enable */
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CSC_HandShakeModeType eHandShakeMode; /*!< CCMx Handshake Mode */
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} CSC_CCMCfgType;
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/**
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* @brief Indicate the clock status for each clock source in clock tree list
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*
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*/
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typedef enum
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{
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CSC0_CLOCK_UNDEFINE = 0U, /*!< Clock status undefined from power on */
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CSC0_CLOCK_DISABLE = 1U, /*!< clock source set as disabled */
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CSC0_CLOCK_VALID = 2U, /*!< clock set succeed */
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CSC0_CLOCK_ERROR = 3U, /*!< clock set failed */
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CSC0_CLOCK_UNKNOWN = 4U
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} CSC0_ClockStatusDef;
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/**
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* @brief CSC0 clock source type for clock infomation querry
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*
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*/
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typedef enum
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{
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CSC0_AON32K_CLK = 0U, /*!< AON32K_CLK */
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CSC0_RTC_CLK = 1U, /*!< RTC_CLK */
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CSC0_AON_CLK = 2U, /*!< AON_CLK */
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CSC0_CLKOUT_CLK = 3U, /*!< CLKOUT_CLK */
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CSC0_END_OF_CLOCKS = 4U /*!< End of CSC0 clocks */
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} CSC0_ClkSrcType;
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/**
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* @brief CSC0_SMU control group info
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*
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*/
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typedef enum
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{
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CSC0_SMU_CTRL_GROUP_0 = 0U, /*!< CSC0_SMU control group 0 */
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CSC0_SMU_CTRL_GROUP_1, /*!< CSC0_SMU control group 1 */
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CSC0_SMU_CTRL_GROUP_4, /*!< CSC0_SMU control group 4 */
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CSC0_SMU_CTRL_GROUP_5 /*!< CSC0_SMU control group 5 */
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} CSC0_SmuCtrlGrpType;
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/**
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* @brief Module clock status and frequency record structure
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*
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* */
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typedef struct
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{
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CSC0_ClockStatusDef eClkStatus; /*!< Indicate the clock status for each clock source in clock tree list */
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uint32_t u32Freq; /*!< frequency value */
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} CSC0_ClockInfoType;
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/**
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* @brief Data type for register CSC0_CLKOUT_CTRL,mainly focus on CLKOUT setting
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*
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*/
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typedef struct
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{
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bool bEnable; /*!< CSC0 ClockOut enable */
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CSC0_ClockOutSrcType eClkOutSrc; /*!< CSC0 ClockOut source select */
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CSC0_ClockOutDivType eDivider; /*!< CSC0 ClockOut divide ratio */
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} CSC0_ClkoutType;
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/**
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* @brief CSC0_AONCLKSR clock source info
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*
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*/
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typedef struct
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{
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CSC0_AON32KClkSrcType eAon32KSel; /*!< CSC0 32 KHz Always-on Clock Source Select */
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CSC0_RTCClkSrcType eRtcSel; /*!< CSC0 RTC Clock Source Select */
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CSC0_AONClkSrcType eAonSel; /*!< CSC0 AON Clock Source Select */
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} CSC0_AONCLKSRType;
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/**
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* @brief CSC0_LP_WAKEUP low power wakeup configure type
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*
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*/
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typedef struct
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{
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CSC0_LPWakeupSrcType eCfgGrp0; /*!< LP_WAKEUP_PAD0 Configure Source */
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CSC0_LPWakeupSrcType eCfgGrp1; /*!< LP_WAKEUP_PAD1 Configure Source */
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CSC0_LPWakeupSrcType eCfgGrp2; /*!< LP_WAKEUP_PAD2 Configure Source */
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CSC0_LPWakeupSrcType eCfgGrp3; /*!< LP_WAKEUP_PAD3 Configure Source */
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CSC0_LPWakeupSrcType eCfgGrp4; /*!< LP_WAKEUP_PAD4 Configure Source */
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CSC0_LPWakeupPolType ePolGrp0; /*!< LP_WAKEUP_CFG0 Wakeup Polarity */
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CSC0_LPWakeupPolType ePolGrp1; /*!< LP_WAKEUP_CFG1 Wakeup Polarity */
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CSC0_LPWakeupPolType ePolGrp2; /*!< LP_WAKEUP_CFG2 Wakeup Polarity */
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CSC0_LPWakeupPolType ePolGrp3; /*!< LP_WAKEUP_CFG3 Wakeup Polarity */
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CSC0_LPWakeupPolType ePolGrp4; /*!< LP_WAKEUP_CFG4 Wakeup Polarity */
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} CSC0_LPWakeupCfgType;
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/********* Local function ************/
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/**
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* @brief set clock out. with clock out pin configure, the clock would be monitored.
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* This Function may combined with SCG_ClkOut setting
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* need to call SCG_SetClkOut,if clock out source set to SCG_CLKOUT. *
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* @param pCsc0ClkOut to Csc0ClkOut instance for clock out configuration
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* @param bLockStatus to lock current register
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_LOCK: The register has been locked and can not be written
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* @note configuration sequence:
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* 1. Disable CLKOUTEN
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* 2. Set CLKOUTSEL
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* 3. Enable CLKOUTEN
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*/
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CSC_RetStatusType CSC0_SetClockOut(const CSC0_ClkoutType *const pCsc0ClkOut, bool bLockStatus);
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/**
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* @brief set always on clock source configuration include AON32K, RTC, AONCLK clock.
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*
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* @param pAonclkSrcType pointer to AONCLKSR instance for AON clock source configuration
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* @param bLockStatus to lock current register
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_LOCK: The register has been locked and can not be written
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*/
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CSC_RetStatusType CSC0_SetAonClkSrc(const CSC0_AONCLKSRType *const pAonclkSrcType, bool bLockStatus);
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/**
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* @brief Report the clock source status and frequency configured in MCU run time.
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* The clock frequency and status would change by clock set function.
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*
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* @param eClkkName: the CSC0 clock source to query
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* @param pFreq: frequency variable point to get the frequency value
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eClkkName invalid
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*/
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CSC_RetStatusType CSC0_GetCSC0ClockFreq(CSC0_ClkSrcType eClkkName, uint32_t *const pFreq);
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/**
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* @brief SCG MAM stall request.
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* @details Need to assert the SCG_STALL to stall MAM when configuring the SCG clock source.
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*
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* @param bEnable: true asserts SCG MAM stall request
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* false do not asserts SCG MAM stall request
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* @param bLockStatus: Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eClkkName invalid
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*/
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CSC_RetStatusType CSC0_ScgMAMStallRequest(bool bEnable, bool bLockStatus);
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/**
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* @brief Set request to SMU of group 0.
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*
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* @param u32Value Value to be set(the or bits defined in CSC_SMU_CtrlGrp0Type,do not involve lock bit)
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* @param bLockStatus Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: The u32Value contains invalid bits
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* CSC_E_LOCK: The register has been locked
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*/
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CSC_RetStatusType CSC0_SetReqToSMUGrp0(uint32_t u32Value, bool bLockStatus);
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/**
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* @brief Set request to SMU of group 1.
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*
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* @param u32Value Value to be set(the or bits defined in CSC_SMU_CtrlGrp1Type,do not involve lock bit)
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* @param bLockStatus Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: The u32Value contains invalid bits
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* CSC_E_LOCK: The register has been locked
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*/
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CSC_RetStatusType CSC0_SetReqToSMUGrp1(uint32_t u32Value, bool bLockStatus);
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/**
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* @brief Set request to SMU of group 4.
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*
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* @param u32Value Value to be set(the or bits defined in CSC_SMU_CtrlGrp4Type,do not involve lock bit)
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* @param bLockStatus Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: The u32Value contains invalid bits
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* CSC_E_LOCK: The register has been locked
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*/
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CSC_RetStatusType CSC0_SetReqToSMUGrp4(uint32_t u32Value, bool bLockStatus);
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/**
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* @brief Set request to SMU of group 5.
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*
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* @param u32Value Value to be set(the or bits defined in CSC_SMU_CtrlGrp5Type,do not involve lock bit)
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* @param bLockStatus Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: The u32Value contains invalid bits
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* CSC_E_LOCK: The register has been locked
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*/
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CSC_RetStatusType CSC0_SetReqToSMUGrp5(uint32_t u32Value, bool bLockStatus);
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/**
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* @brief Set request to SMU .
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*
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* @param eCtrlGrp CSC0_SMU control group
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* @param u32Value Value to be set(the or bits defined in CSC_SMU_CtrlGrp5Type,do not involve lock bit)
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* @param bLockStatus Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_PARAM: The eCtrlGrp is invalid
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* CSC_E_NOT_OK: The u32Value contains invalid bits
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* CSC_E_LOCK: The register has been locked
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* @note Group must be matched with u32Value which select from CSC0_SmuCtrlGrpType
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*/
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CSC_RetStatusType CSC0_SetReqToSMU(CSC0_SmuCtrlGrpType eCtrlGrp, uint32_t u32Value, bool bLockStatus);
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/**
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* @brief Configure the low power wakeup PAD output in CSC0_LP_WAKEUP register.
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*
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* @param eLPWakeupCfg: the low power wakeup PAD source and polarity configuration
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* @param bLockStatus: Lock the register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_LOCK: The WPB of CSCx_STOP_MODERx is already locked
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*/
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CSC_RetStatusType CSC0_LP_WakeupPadOutputCfg(const CSC0_LPWakeupCfgType * const eLPWakeupCfg, bool bLockStatus);
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/**
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* @brief Set CPU stop mode control permission.
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* @detail This API is used to set the CPU write permission of a CPU's stop mode registers.
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* eg.If the CPU(eTargetCpuType) enter stop mode, it acknowledges the peripherals according to the configuration
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* in CSCx_STOP_MODERy (x: (CPUID) range[0] , y:(GROUP) range[0,1,2]), and the CPU(eCtrlCpuType)
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* has the write permission of CSCx_STOP_MODERy registers, the permission is controlled by this API.
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*
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* @param eTargetCpuType The target CPU to set.
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* @param eCtrlCpuType The CPU that has the write permission to the CSCx_STOP_MODERy register.
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* @param ePeriphGrp Peripheral group (range:0,1,2)
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* @param bLockStatus Lock the WPB of CSCx_STOP_MODERx.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_LOCK: The WPB of CSCx_STOP_MODERx is already locked
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*/
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CSC_RetStatusType CSC_SetStopModeAckPermission(CSC_WPB_CpuType eTargetCpuType, CSC_WPB_CpuType eCtrlCpuType,
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CSC_PeriphGrpType ePeriphGrp, bool bLockStatus);
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/**
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* @brief Set CPU stop mode request control permission.
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* @detail This API is used to set the CPU write permission of a CPU's stop mode request registers
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* to generate a stop request to peripherals
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*
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* @param eTargetCpuType The target CPU to acknowledges stop mode to the enabled peripherals.
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* @param eCtrlCpuType The CPU that has the write permission to the CSCx_STOP_REQRx register.
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* @param ePeriphGrp Peripheral group (range:0,1,2)
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* @param bLockStatus Lock the WPB of CSCx_STOP_REQRx.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_LOCK: The WPB of CSCx_STOP_REQRx is already locked
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*/
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CSC_RetStatusType CSC_SetStopRequestPermission(CSC_WPB_CpuType eTargetCpuType, CSC_WPB_CpuType eCtrlCpuType,
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CSC_PeriphGrpType ePeriphGrp, bool bLockStatus);
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/**
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* @brief Set the stop mode ack of peripheral group 0 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to enable or disable the stop mode ACK
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* @param bEnable true: enable the stop mode ACK
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* false: disable the stop mode ACK
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopModeAckGrp0(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg0_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop request of peripheral group 0 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to set stop request
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* @param bEnable true: set the stop request
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* false: clear the stop request
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopRequestGrp0(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg0_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop mode ACK of peripheral group 1 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to enable or disable the stop mode ACK
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* @param bEnable true: enable the stop mode ACK
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* false: disable the stop mode ACK
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopModeAckGrp1(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg1_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop request of peripheral group 1 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to set stop request
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* @param bEnable true: set the stop request
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* false: clear the stop request
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopRequestGrp1(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg1_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop mode ACK of peripheral group 2 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to enable or disable the stop mode ACK
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* @param bEnable true: enable the stop mode ACK
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* false: disable the stop mode ACK
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopModeAckGrp2(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg2_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop request of peripheral group 2 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the ePeriphType when entering stop mode.
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* @param ePeriphType the peripheral to set stop request
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* @param bEnable true: set the stop request
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* false: clear the stop request
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopRequestGrp2(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg2_PeriphType ePeriphType, bool bEnable);
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/**
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* @brief Set the stop mode ACK of all group peripherals in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphGrp the group of peripherals to set the stop mode ACK value
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* @param u32Value the CSCx_STOP_MODERx register value
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_PARAM: ePeriphGrp or u32Value invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopModeAck(CSC_WPB_CpuType eTargetCpuType, CSC_PeriphGrpType ePeriphGrp, uint32_t u32Value);
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/**
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* @brief Set the stop request of all group peripherals in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphGrp the group of peripherals to set the stop request value
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* @param u32Value the CSCx_STOP_REQRx register value
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_PARAM: ePeriphGrp or u32Value invalid
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* CSC_E_NO_PERM: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetStopRequest(CSC_WPB_CpuType eTargetCpuType, CSC_PeriphGrpType ePeriphGrp, uint32_t u32Value);
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/**
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* @brief Get the stop Acknowledge status of peripherals group0 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphType the peripheral to get stop acknowledge status
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* @param pStatus Output parameter,to save the stop ACK status of the peripheral indicated by ePeriphType
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* true: Stop acknowledge is asserted (the module is in Stop mode)
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* false: Stop acknowledge is not asserted
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* @return CSC_RetStatusType Operation success/failed
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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*/
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CSC_RetStatusType CSC_GetStopAckStatusGrp0(CSC_WPB_CpuType eTargetCpuType,CSCx_Reg0_PeriphType ePeriphType, bool * const pStatus);
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/**
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* @brief Get the stop Acknowledge status of peripherals group1 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphType the peripheral to get stop acknowledge status
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* @param pStatus Output parameter,to save the stop ACK status of the peripheral indicated by ePeriphType
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* true: Stop acknowledge is asserted (the module is in Stop mode)
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* false: Stop acknowledge is not asserted
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* @return CSC_RetStatusType Operation success/failed
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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*/
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CSC_RetStatusType CSC_GetStopAckStatusGrp1(CSC_WPB_CpuType eTargetCpuType, CSCx_Reg1_PeriphType ePeriphType, bool * const pStatus);
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/**
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* @brief Get the stop Acknowledge status of peripherals group2 in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphType the peripheral to get stop acknowledge status
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* @param pStatus Output parameter,to save the stop ACK status of the peripheral indicated by ePeriphType
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* true: Stop acknowledge is asserted (the module is in Stop mode)
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* false: Stop acknowledge is not asserted
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* @return CSC_RetStatusType Operation success/failed
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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*/
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CSC_RetStatusType CSC_GetStopAckStatusGrp2(CSC_WPB_CpuType eTargetCpuType,CSCx_Reg2_PeriphType ePeriphType, bool * const pStatus);
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/**
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* @brief Get the stop Acknowledge status of all group peripherals in CSC.
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*
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* @param eTargetCpuType The target CPU which acknowledges the peripherals when entering stop mode.
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* @param ePeriphType the peripheral to get stop acknowledge status
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* @param pU32Status Output parameter,to save the stop ACK status of all the peripherals in the group indicated by ePeriphGrp.
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* The corresponding bit is 1, indicates that stop acknowledge is asserted,and 0 not asserted.
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* @return CSC_RetStatusType Operation success/failed
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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*/
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CSC_RetStatusType CSC_GetStopAckStatus(CSC_WPB_CpuType eTargetCpuType,CSC_PeriphGrpType ePeriphGrp, uint32_t * const pU32Status);
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/**
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* @brief Set the CPU write permission of CSCx_CCMx_CFG register in CSC.
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*
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* @param eTargetCpuType The target CPU controlled by CSCx_CCMx_CFG register.
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* @param eCtrlCpuType The CPU that has the permission to access the CSCx_CCMx_CFG register.
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* @param bLockStatus Lock the WPB of CSCx_CCMx_CFG register.Once locked, calling the API returns an error(CSC_E_LOCK).
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_LOCK: WPB is locked(WPB_LOCK set 1) and can not be written
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*/
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CSC_RetStatusType CSC_SetCCMCfgPermission(CSC_WPB_CpuType eTargetCpuType, CSC_WPB_CpuType eCtrlCpuType, bool bLockStatus);
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/**
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* @brief Set the CCM configuration of CPUx indicated by eTargetCpuType.
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*
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* @param eTargetCpuType The target CPU controlled by CSCx_CCMx_CFG register.
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* @param pCCMCfg Pointer to the configuration of CSCx_CCMx_CFG register.
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*
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* @return CSC_RetStatusType
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* CSC_E_OK: The API is successfully called
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* CSC_E_NOT_OK: eTargetCpuType invalid
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* CSC_E_LOCK: Current CPU has no permission to access the register
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*/
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CSC_RetStatusType CSC_SetCCMConfiguration(CSC_WPB_CpuType eTargetCpuType,const CSC_CCMCfgType *const pCCMCfg);
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/**
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* @brief Get the CCM stop clock status.
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*
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* @param eTargetCpuType The target CPU controlled by CSCx_CCMx_CFG register.
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* @param eCCMType CCM stop clock type.
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* @param pStatus Pointer to memory to save the clock status.
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*
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* @return CSC_RetStatusType
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|
* CSC_E_OK: The API is successfully called
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|
* CSC_E_NOT_OK: eTargetCpuType invalid
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|
*/
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CSC_RetStatusType CSC_GetCCMStopClockStatus(CSC_WPB_CpuType eTargetCpuType, CSCx_CCM_StopClockType eCCMType, bool * const pStatus);
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/**
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|
* @brief Set the CPU write permission of CSCx_CPUx_INT register in CSC.
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|
*
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|
* @param eTargetCpuType The target CPU controlled by CSCx_CPUx_INT register.
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|
* @param eCtrlCpuType The CPU that has the permission to access the CSCx_CPUx_INT register.
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|
* @param bLockStatus Lock the WPB of CSCx_CPUx_INT register.Once locked, calling the API returns an error(CSC_E_LOCK).
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|
*
|
|
* @return CSC_RetStatusType
|
|
* CSC_E_OK: The API is successfully called
|
|
* CSC_E_NOT_OK: eTargetCpuType invalid
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|
* CSC_E_LOCK: WPB is locked(WPB_LOCK set 1) and can not be written
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|
*/
|
|
CSC_RetStatusType CSC_SetCpuIntPermission(CSC_WPB_CpuType eTargetCpuType, CSC_WPB_CpuType eCtrlCpuType, bool bLockStatus);
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|
|
/**
|
|
* @brief Generate software interrupt via CSCx_CPUx_INT.
|
|
*
|
|
* @param eTargetCpuType The target CPU to generate interrupt.
|
|
* @param bEnable true: Generate software interrupt.
|
|
* false: Do not generate software interrupt.
|
|
*
|
|
* @return CSC_RetStatusType
|
|
* CSC_E_OK: The API is successfully called
|
|
* CSC_E_NOT_OK: eTargetCpuType invalid
|
|
* CSC_E_LOCK: The current CPU has no permission to access this bit
|
|
*/
|
|
CSC_RetStatusType CSC_CpuSwInterruptGen(CSC_WPB_CpuType eTargetCpuType, bool bEnable);
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|
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#endif /* End of _DRIVER_CSC_H_ */
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