132 lines
3.7 KiB
C
132 lines
3.7 KiB
C
/**
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* @file fc7xxx_driver_wdog.c
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* @author Flagchip
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* @brief FC7xxx WDOG driver source code
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* @version 0.1.0
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* @date 2023-12-29
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*
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* @copyright Copyright (c) 2022 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2023-12-29 qxw0074 N/A First version for FC7240
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********************************************************************************/
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#include "fc7xxx_driver_wdog.h"
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/**
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* @brief UNLOCK and REFRESH CMD For MPW FC100. this may not match with FC4150 user manual
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*/
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#define WDOG_UNLOCK_CMD (uint32_t)(0x08181982U)
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#define WDOG_REFRESH_CMD (uint32_t)(0x20CFFC20U)
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static WDOG_Type *const s_apWdogBase[WDOG_INSTANCE_COUNT] = WDOG_BASE_PTRS;
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static WDOG_IRQ_Callback aIRQCallback[WDOG_INSTANCE_MAX] = {0U};
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void WDOG0_IRQHandler(void);
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void WDOG1_IRQHandler(void);
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/**
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* @brief unlock the wdog before Watch dog reconfigure set.
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* @param instance: WDOG module instance: WDOG0/WDOG1 defined in FC4150.
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*/
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void WDOG_Unlock(WDOG_InstanceType eInstance)
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{
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WDOG_Type *pWdog = s_apWdogBase[eInstance];
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WDOG_HWA_SetCounter(pWdog,WDOG_UNLOCK_CMD);
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}
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/**
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* @brief feed the watch dog by writing typical cmd to counter.
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* @param instance: WDOG module instance: WDOG0/WDOG1 defined in FC4150.
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*/
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void WDOG_Refresh(WDOG_InstanceType eInstance)
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{
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WDOG_Type *pWdog = s_apWdogBase[eInstance];
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WDOG_HWA_SetCounter(pWdog,WDOG_REFRESH_CMD);
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}
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/**
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* @brief Initialize the WDOG configuration setting. *
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* @param pWdogCfg: point to WDOG init module type.
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*/
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void WDOG_Init(WDOG_InstanceType eInstance,WDOG_CfgType* pWdogCfg)
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{
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WDOG_Type *pWdog = s_apWdogBase[eInstance];
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uint32_t u32Temp = 0U;
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/* Disable the global interrupt */
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__disable_irq();
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u32Temp = WDOG_CS_WIN(pWdogCfg->bWinEnable) | WDOG_CS_PRESCALER(pWdogCfg->bPrescalerEnable) |
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WDOG_CS_CLK_SEL(pWdogCfg->eClkSource) | WDOG_CS_TST(pWdogCfg->eTesttype) |
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WDOG_CS_DBG(pWdogCfg->bEnableInDebug) | WDOG_CS_UPDATE_MASK | WDOG_CS_ENABLE_MASK |
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WDOG_CS_WAIT(pWdogCfg->bEnableInWait) | WDOG_CS_STOP(pWdogCfg->bEnableInStop);
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if(WDOG_REACTION_NO_INT != pWdogCfg->eTimeoutReaction)
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{
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u32Temp |= (WDOG_CS_INT_MASK | WDOG_CS_DLY_CNT_MSB(pWdogCfg->eTimeoutReaction));
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}
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else
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{
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//Do nothing. Keep disabling the wdog interrupt and no reset dealy.
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}
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WDOG_Unlock(eInstance);
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while (WDOG_HWA_GetUnlockStatus(pWdog) == false)
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{
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/* 0 indicate WDOG locked. Wait until registers are unlocked */
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}
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WDOG_HWA_SetCs(pWdog,u32Temp);
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WDOG_Unlock(eInstance);
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while (WDOG_HWA_GetUnlockStatus(pWdog) == false)
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{
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/* 0 indicate WDOG locked. Wait until registers are unlocked */
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}
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/* configure the timeout value */
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WDOG_HWA_SetTimeout(pWdog,pWdogCfg->u16TimeoutValue);
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WDOG_Unlock(eInstance);
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while (WDOG_HWA_GetUnlockStatus(pWdog) == false)
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{
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/* 0 indicate WDOG locked. Wait until registers are unlocked */
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}
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/* configure window value */
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WDOG_HWA_SetWindow(pWdog,pWdogCfg->u16WindowValue);
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aIRQCallback[eInstance] = pWdogCfg->pISRCallback;
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/* Enable the global interrupt */
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__enable_irq();
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}
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void WDOG0_IRQHandler(void)
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{
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WDOG_HWA_ClearInterruptFlag(WDOG0);
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if(NULL != aIRQCallback[WDOG_INSTANCE_0])
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{
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(aIRQCallback[WDOG_INSTANCE_0])();
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}
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}
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void WDOG1_IRQHandler(void)
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{
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WDOG_HWA_ClearInterruptFlag(WDOG1);
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if(NULL != aIRQCallback[WDOG_INSTANCE_1])
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{
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(aIRQCallback[WDOG_INSTANCE_1])();
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}
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}
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