177 lines
5.1 KiB
C
177 lines
5.1 KiB
C
/**
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* @file module_driver_tpu.c
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* @author Flagchip099
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* @brief FC7xxx TPU driver source code
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* @version 0.1.0
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* @date 2024-1-12
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-1-12 Flagchip099 N/A First version for FC7240
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******************************************************************************** */
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#ifndef FC7XXX_DRIVER_TPU_H
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#define FC7XXX_DRIVER_TPU_H
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/* ----------------------------------------------------------------------------
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-- TPU_H Peripheral Access Layer
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---------------------------------------------------------------------------- */
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#include "HwA_tpuh.h"
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#include "HwA_tpue.h"
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#include "HwA_scm.h"
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#define TPU_TCR1_MAXVALUE 0xFFFFFFU
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#define TPU_CHANNEL_NUM 32U
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extern void RTT_Printf(char *fmt, ...);
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#define DEBUG_INFO(str, ...) RTT_Printf(str, ##__VA_ARGS__)
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/**
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* @brief TPU event callback function prototype
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*
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*/
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typedef void (*TPU_EventCallbackType)(void);
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typedef void (*TPU_TCR1OverflowCallbackType)(void);
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typedef void (*TPU_TCR2OverflowCallbackType)(void);
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typedef void (*TPU_HSACallbackType)(void);
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typedef enum
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{
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TPU_DutyMeasurementActiveHigh = 0x0U,
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TPU_DutyMeasurementActiveLow = 0x1U,
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TPU_PeriodMeasurement = 0x2U,
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} TPU_MeasureModeType;
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typedef enum
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{
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TPU_CHANNEL_0 = 0U,
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TPU_CHANNEL_1 = 1U,
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TPU_CHANNEL_2 = 2U,
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TPU_CHANNEL_3 = 3U,
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TPU_CHANNEL_4 = 4U,
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TPU_CHANNEL_5 = 5U,
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TPU_CHANNEL_6 = 6U,
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TPU_CHANNEL_7 = 7U,
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TPU_CHANNEL_8 = 8U,
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TPU_CHANNEL_9 = 9U,
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TPU_CHANNEL_10 = 10U,
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TPU_CHANNEL_11 = 11U,
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TPU_CHANNEL_12 = 12U,
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TPU_CHANNEL_13 = 13U,
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TPU_CHANNEL_14 = 14U,
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TPU_CHANNEL_15 = 15U,
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TPU_CHANNEL_16 = 16U,
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TPU_CHANNEL_17 = 17U,
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TPU_CHANNEL_18 = 18U,
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TPU_CHANNEL_19 = 19U,
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TPU_CHANNEL_20 = 20U,
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TPU_CHANNEL_21 = 21U,
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TPU_CHANNEL_22 = 22U,
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TPU_CHANNEL_23 = 23U,
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TPU_CHANNEL_24 = 24U,
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TPU_CHANNEL_25 = 25U,
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TPU_CHANNEL_26 = 26U,
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TPU_CHANNEL_27 = 27U,
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TPU_CHANNEL_28 = 28U,
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TPU_CHANNEL_29 = 29U,
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TPU_CHANNEL_30 = 30U,
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TPU_CHANNEL_31 = 31U,
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TPU_CHANNEL_MAX = TPU_E_CH_COUNT
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} TPU_ChannelType;
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/** TPU_H - Register Layout Typedef */
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/** @brief ETPU config type */
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typedef struct
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{
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TPUE_TimeBaseSelctionType eTBS1; /**< modulate 0 value */
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TPUE_TimeBaseSelctionType eTBS2; /**< modulate 1 value */
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bool bPwmUseTCR1; /**< modulate 2 value */
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bool bPwmUseTCR2; /**< modulate 3 value */
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uint32_t u32ActiveTime;
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uint32_t u32PeriodTime;
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bool bActiveHigh;
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} TPU_PwmCfgType;
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typedef struct
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{
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uint32_t u32PeriodTime;
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TPU_MeasureModeType eMeasureMode;
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TPUE_IPACType eInputType;
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uint32_t u32SampleTime;
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uint32_t u32ActiveTime;
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uint32_t LastTime;
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uint32_t StartTime;
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} TPU_CaptureCfgType;
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/**
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* @brief The interrupt configurations of the Tpu channel
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*
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*/
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typedef struct
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{
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bool bEventIntEn; /*!< Enable interrupt after match */
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bool bTCR1OverFlowEventIntEn; /*!< Enable interrupt after TCR1 OverFlow */
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bool bTCR2OverFlowEventIntEn; /*!< Enable interrupt after TCR2 OverFlow */
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TPU_EventCallbackType pEventNotify; /*!< transfer complete notification */
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TPU_HSACallbackType pHSANotify; /*!< HSA notification */
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TPU_TCR1OverflowCallbackType pTCR1OverflowNotify;
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TPU_TCR2OverflowCallbackType pTCR2OverflowNotify;
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TPUH_ChTrigCFGType eChTrigType;
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} TPU_InterruptCfgType;
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void TPU_InitChannelInterrupt(uint8_t u8Channel, const TPU_InterruptCfgType *const pInterruptCfg);
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void TPU_PwmModeInit(uint8_t u8channel, const TPU_PwmCfgType *const p_etpu_config);
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void TPU_PwmServiceReq(uint8_t u8channel, uint32_t u32ActiveTime, uint32_t u32Period);
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void TPU_CaptureModeInit(uint8_t u8channel, const TPU_CaptureCfgType *const p_etpu_config);
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void TPU_StartChannel(void);
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void TPU_SetHSR(uint8_t u8channel, uint8_t u8HSRIdx);
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void TPU_SendHSR(uint8_t u8channel);
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uint8_t TPU_GetHSA(uint8_t u8Channel);
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void TPU_InitChannelHSAInterrupt(uint8_t u8Channel, const TPU_InterruptCfgType *const pInterruptCfg);
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void TPU_InitChannelOverflowInterrupt(const TPU_InterruptCfgType *const pInterruptCfg);
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void TPU_EnableSubSystem(void);
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void TPU_EnableEventTrigDma(uint8_t u8Channel);
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void TPU_CaptureMeasPeriodServiceReq(uint8_t u8channel, TPU_CaptureCfgType *p_etpu_config);
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void TPU_CaptureMeasActivePeriodServiceReq(uint8_t u8channel, TPU_CaptureCfgType *p_etpu_config);
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void TPU_DeInit(void);
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void TPU_Init(void);
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void TPU_EnableFlexcoreTrigDma(uint8_t u8Channel);
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void TPU_EnableEventTrigTrgSel(uint8_t u8Channel, const TPU_InterruptCfgType *const pInterruptCfg);
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/*!
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* @}
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*/ /* end of group TPU_H_Peripheral_Access_Layer */
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#endif /* #ifndef FC7XXX_DRIVER_TPU_H */
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