56 lines
2.0 KiB
C
56 lines
2.0 KiB
C
/**
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* @file fc7xxx_driver_smc.h
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* @author Flagchip
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* @brief FC7xxx SMC driver type definition and API
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* @version 0.1.0
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* @date 2022-11-21
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*
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* @copyright Copyright (c) 2023 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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#ifndef _DRIVER_FC4XXX_DRIVER_SMC_H_
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#define _DRIVER_FC4XXX_DRIVER_SMC_H_
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#include "HwA_smc.h"
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#include "HwA_pmc.h"
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#include "HwA_cm7.h"
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/**
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* @addtogroup fc7xxx_driver_smc
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* @{
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*/
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/** @brief Smc return type. */
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typedef enum
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{
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SMC_STATUS_SUCCESS = 0U,
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SMC_STATUS_PARAM_INVALID = 1U
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} SMC_StatusType;
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/** @brief Smc mode */
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typedef enum
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{
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SMC_MODE_RUN = 0U, /**< The MCU can run at full speed and the internal supply is fully regulated, that is, in run regulation */
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SMC_MODE_STOP, /**< Core enters sleep mode and no other clock is gated. Only the core clock is gated. */
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SMC_MODE_WAIT, /**< Both core and bus clocks are gated off. */
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SMC_MODE_STANBY_0, /**< All clocks except some low-power clocks can keep on are gated off and the PD1 domain is powered off. please refer to reference manual for detail about standby mode 0. */
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SMC_MODE_STANBY_1, /**< All clocks except some low-power clocks can keep on are gated off and the PD1 domain is powered off. please refer to reference manual for detail about standby mode 1. */
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SMC_MODE_STANBY_2, /**< All clocks except some low-power clocks can keep on are gated off and the PD1 domain is powered off. please refer to reference manual for detail about standby mode 2. */
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SMC_MODE_STANBY_3 /**< All clocks except some low-power clocks can keep on are gated off and the PD1 domain is powered off. please refer to reference manual for detail about standby mode 3. */
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} SMC_ModeType;
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#define SMC_MODE_MAX_ID 6U
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/* global functions */
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/**
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* @brief Set system mode
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*
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* @param eMode MCU low power mode
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* @return Smc return type
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*/
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SMC_StatusType SMC_SetSystemMode(const SMC_ModeType eMode);
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/** @}*/ /* fc7xxx_driver_smc */
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#endif
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