243 lines
7.8 KiB
C
243 lines
7.8 KiB
C
/**
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* @file fc7xxx_driver_mpu.h
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* @author Flagchip085
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* @brief FC7xxx MPU driver type definition and API
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* @version 0.1.0
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* @date 2024-01-12
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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* @details The MPU only checks the CPU master access to CTCM and DTCM memory. When access denied, it will cause MemManage Interrupt.
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-12 Flagchip085 N/A First version for FC7240
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******************************************************************************** */
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#ifndef _DRIVER_FC7XXX_DRIVER_MPU_H_
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#define _DRIVER_FC7XXX_DRIVER_MPU_H_
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#include "HwA_mpu.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* @addtogroup fc7xxx_driver_mpu
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* @{
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*/
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/**
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* @brief Status enumeration used by Flagchip MPU Driver
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*
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*/
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typedef enum {
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MPU_STATUS_SUCCESS = 0, /*!< MPU API execute successfully */
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MPU_STATUS_ERROR, /*!< Some error occur in MPU API */
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} MPU_StatusType;
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/**
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* @brief
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*
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*/
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typedef enum {
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MPU_EN_HFNMI_PRIVDEF_NONE = 0U, /*!< disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault,
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MPU is disabled during hard fault, NMI, and FAULTMASK handlers */
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MPU_EN_HARDFAULT_NMI = 1, /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
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MPU_EN_PRIVILEGED_DEFAULT = 2, /*!< enables use of the default memory map as a background region for privileged software accesses.
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When enabled, the background region acts as if it is region number -1.
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Any region that is defined and enabled has priority over this default map. */
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MPU_EN_HFNMI_PRIVDEF = 3, /*!< same with MPU_EN_HARDFAULT_NMI | MPU_EN_PRIVILEGED_DEFAULT */
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} MPU_EnableOptionType;
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/**
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* @brief Enable Status for Sub-region configuration
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*
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*/
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typedef enum {
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MPU_REGION_SRD_ENABLE_SUBREGION = 0, /*!< sub-region is enabled */
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MPU_REGION_SRD_DISABLE_SUBREGION = 1, /*!< sub-region is not enabled */
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} MPU_RegionSubDisableType;
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/**
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* @brief Configure the code in the region whether can be execute
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*
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*/
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typedef enum {
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MPU_REGION_XN_EXECUTE_ENABLE = 0x0,
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MPU_REGION_XN_EXECUTE_DISABLE = 0x1
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} MPU_RegionExecuteNeverType;
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/**
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* @brief region Shareable configuration
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*
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*/
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typedef enum {
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MPU_REGION_S_DISABLE = 0,
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MPU_REGION_S_ENABLE = 1
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} MPU_RegionShareableType;
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/**
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* @brief Region Cacheable configuration
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*
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*/
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typedef enum {
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MPU_REGION_C_DISABLE = 0,
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MPU_REGION_C_ENABLE = 1
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} MPU_RegionCacheableType;
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/**
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* @brief Region Bufferable configuration
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*
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*/
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typedef enum {
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MPU_REGION_B_DISABLE = 0,
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MPU_REGION_B_ENABLE = 1
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} MPU_RegionBufferableType;
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/**
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* @brief Region Type Extend Level configuration
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*
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*/
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typedef enum {
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MPU_REGION_TEX_LEVEL_0 = 0,
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MPU_REGION_TEX_LEVEL_1 = 1,
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MPU_REGION_TEX_LEVEL_2 = 2
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} MPU_RegionTypeExtLevelType;
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/**
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* @brief Region size enumeration for enabling MPU region
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*
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*/
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typedef enum {
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MPU_REGION_SIZE_32B = 0x04,
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MPU_REGION_SIZE_64B = 0x05,
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MPU_REGION_SIZE_128B = 0x06,
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MPU_REGION_SIZE_256B = 0x07,
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MPU_REGION_SIZE_512B = 0x08,
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MPU_REGION_SIZE_1KB = 0x09,
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MPU_REGION_SIZE_2KB = 0x0A,
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MPU_REGION_SIZE_4KB = 0x0B,
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MPU_REGION_SIZE_8KB = 0x0C,
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MPU_REGION_SIZE_16KB = 0x0D,
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MPU_REGION_SIZE_32KB = 0x0E,
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MPU_REGION_SIZE_64KB = 0x0F,
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MPU_REGION_SIZE_128KB = 0x10,
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MPU_REGION_SIZE_256KB = 0x11,
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MPU_REGION_SIZE_512KB = 0x12,
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MPU_REGION_SIZE_1MB = 0x13,
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MPU_REGION_SIZE_2MB = 0x14,
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MPU_REGION_SIZE_4MB = 0x15,
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MPU_REGION_SIZE_8MB = 0x16,
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MPU_REGION_SIZE_16MB = 0x17,
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MPU_REGION_SIZE_32MB = 0x18,
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MPU_REGION_SIZE_64MB = 0x19,
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MPU_REGION_SIZE_128MB = 0x1A,
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MPU_REGION_SIZE_256MB = 0x1B,
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MPU_REGION_SIZE_512MB = 0x1C,
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MPU_REGION_SIZE_1GB = 0x1D,
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MPU_REGION_SIZE_2GB = 0x1E,
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MPU_REGION_SIZE_4GB = 0x1F
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} MPU_RegionSizeType;
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/**
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* @brief MPU Permission Enumeration
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*
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*/
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typedef enum {
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MPU_REGION_AP_NO_ACCESS = 0x00, /*!< Any access generates a permission fault */
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MPU_REGION_AP_PRIV_RW = 0x01, /*!< Privileged access only, unprivileged no access */
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MPU_REGION_AP_PRIV_RW_URO = 0x02, /*!< Any unprivileged write generates a permission fault */
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MPU_REGION_AP_FULL_ACCESS = 0x03, /*!< Full access */
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MPU_REGION_AP_PRIV_RO = 0x05, /*!< Privileged read-only, unprivileged no access */
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MPU_REGION_AP_PRIV_RO_URO = 0x06 /*!< Privileged and unprivileged read-only */
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} MPU_RegionAccessPermissionType;
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typedef enum {
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MPU_REGION_NUMBER_0 = 0x0, /*!< lowest priority */
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MPU_REGION_NUMBER_1 = 0x1,
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MPU_REGION_NUMBER_2 = 0x2,
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MPU_REGION_NUMBER_3 = 0x3,
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MPU_REGION_NUMBER_4 = 0x4,
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MPU_REGION_NUMBER_5 = 0x5,
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MPU_REGION_NUMBER_6 = 0x6,
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MPU_REGION_NUMBER_7 = 0x7,
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MPU_REGION_NUMBER_8 = 0x8,
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MPU_REGION_NUMBER_9 = 0x9,
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MPU_REGION_NUMBER_10 = 0xA,
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MPU_REGION_NUMBER_11 = 0xB,
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MPU_REGION_NUMBER_12 = 0xC,
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MPU_REGION_NUMBER_13 = 0xD,
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MPU_REGION_NUMBER_14 = 0xE,
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MPU_REGION_NUMBER_15 = 0xF /*!< highest priority */
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} MPU_RegionNumberType;
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typedef struct {
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uint32_t u32BaseAddr; /*!< the start address of region, the least significant 5 bits should be 0 */
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MPU_RegionSizeType eRegionSize; /*!< region size */
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MPU_RegionAccessPermissionType eAccessPermission; /*!< region access permission */
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MPU_RegionExecuteNeverType eExecuteNever; /*!< region data can be execute or not */
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MPU_RegionTypeExtLevelType eTypeExtLevel; /*!< region type extend level */
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MPU_RegionShareableType eShareable; /*!< region shareable */
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MPU_RegionCacheableType eCacheable; /*!< region cacheable */
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MPU_RegionBufferableType eBufferable; /*!< region bufferable */
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MPU_RegionSubDisableType eSubRegionDis_0; /*!< sub-region 0 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_1; /*!< sub-region 1 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_2; /*!< sub-region 2 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_3; /*!< sub-region 3 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_4; /*!< sub-region 4 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_5; /*!< sub-region 5 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_6; /*!< sub-region 6 disable or not */
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MPU_RegionSubDisableType eSubRegionDis_7; /*!< sub-region 7 disable or not */
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} MPU_RegionConfigurationType;
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/**
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* @brief Check the MPU exist or not
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*
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* @return MPU_StatusType if exist return MPU_STATUS_SUCCESS, others not exist
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*/
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MPU_StatusType MPU_CheckExist(void);
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/**
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* @brief Enable the MPU
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*
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* @param eOption Enable Options
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*/
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void MPU_Enable(MPU_EnableOptionType eOption);
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/**
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* @brief Disable MPU
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*
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*/
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void MPU_Disable(void);
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/**
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* @brief Disable region
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*
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* @param eRegion Region index
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* @return MPU_StatusType MPU_STATUS_SUCCESS when disable successfully, others fail
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*/
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MPU_StatusType MPU_RegionDisable(MPU_RegionNumberType eRegion);
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/**
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* @brief Enable region
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*
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* @param eRegion Region index
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* @param pConfig Region Configuration Parameter
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* @return MPU_StatusType MPU_STATUS_SUCCESS when disable successfully, others fail
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*/
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MPU_StatusType MPU_RegionEnable(MPU_RegionNumberType eRegion, const MPU_RegionConfigurationType *pConfig);
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/** @} */ /* fc7xxx_driver_mpu */
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _DRIVER_FC7XXX_DRIVER_MPU_H_ */
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