307 lines
7.6 KiB
C
307 lines
7.6 KiB
C
/**
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* @file HwA_mam.h
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* @author Flagchip
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* @brief Hardware access layer for MAM
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* @version 2.0.0
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* @date 2024-08-20
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*
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* SDK Version: 2.6.0
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*
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* @copyright Copyright (c) 2020-2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2023-12-15 Flagchip054 N/A First version for FC7300
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* 2.0.0 2024-10-12 Flagchip054 N/A Change version and release
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* 2.5.0 2025-08-20 Flagchip0100 N/A Add FC7300F4MDDxxxT1C support
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******************************************************************************** */
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#ifndef _HWA_MAM_H_
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#define _HWA_MAM_H_
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#include "device_header.h"
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#if MAM_INSTANCE_COUNT > 0U
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/**
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* @defgroup HwA_mam HwA_mam
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* @ingroup module_driver_mam
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* @{
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*/
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/**
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* @brief Set Mam module Matrix Configure register
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*
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* @param1 MAM base pointer
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*
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* @param2 u32Value Matrix Configure register value
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*/
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LOCAL_INLINE void Mam_HWA_SetMatrixCfg(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->MAXCFG = u32Value;
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}
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/**
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* @brief Read Mam module Ctrl register
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*
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* @param MAM base pointer
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*
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* @return Matrix Configure register value
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*/
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LOCAL_INLINE uint32_t Mam_HWA_GetMatrixCfg(MAM_Type *MAM)
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{
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return (uint32_t)(MAM->MAXCFG);
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}
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/**
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* @brief Set Mam module Wdgctr register
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*
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* @param1 MAM base pointer
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*
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* @param2 u32Value Wdgctr register value
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*/
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LOCAL_INLINE void Mam_HWA_SetWdgCr(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->WDGCR = u32Value;
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}
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/**
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* @brief Read Mam module Wdgctr register
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*
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* @param MAM base pointer
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*
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* @return Wdgctr register value
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*/
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LOCAL_INLINE uint32 Mam_HWA_GetWdgCr(MAM_Type *MAM)
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{
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return MAM->WDGCR;
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}
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/**
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* @brief Set Mam module timeout control register
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*
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* @param1 MAM base pointer
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*
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* @param2 u32Value timeout control register value
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*/
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LOCAL_INLINE void Mam_HWA_SetWdgToCr(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->TOCR = u32Value;
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}
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/**
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* @brief Read Mam module timeout control register
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*
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* @param MAM base pointer
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*
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* @return timeout control register value
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*/
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LOCAL_INLINE uint32 Mam_HWA_GetWdgToCr(MAM_Type *MAM)
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{
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return MAM->TOCR;
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}
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#ifdef MAM_WDOG_DIV_SUPPORT
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/**
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* @brief Set Mam module watchdog div register
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*
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* @param1 MAM base pointer
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*
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* @param2 u32Value watchdog div register value
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*/
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LOCAL_INLINE void Mam_HWA_SetWdgDiv(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->WDGDIV = u32Value;
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}
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/**
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* @brief Read Mam module watchdog div register
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*
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* @param MAM base pointer
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*
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* @return watchdog div register value
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*/
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LOCAL_INLINE uint32 Mam_HWA_GetWdgDiv(MAM_Type *MAM)
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{
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return MAM->WDGDIV;
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}
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#endif
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/**
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* @brief Set Mam module ACR register
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*
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* @param1 MAM base pointer
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*
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* @param2 idx ACR register index
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*
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* @param3 u32Value ACR register value
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*/
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LOCAL_INLINE void Mam_HWA_Set_ACR(MAM_Type *MAM, uint32_t idx, uint32_t u32Value)
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{
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MAM->ACR[idx] = u32Value;
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}
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/**
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* @brief Read Mam module ACR register
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*
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* @param1 MAM base pointer
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*
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* @param2 idx ACR register index
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*
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* @return ACR register value
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_ACR(MAM_Type *MAM, uint32_t idx)
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{
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return MAM->ACR[idx];
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}
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/**
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* @brief Set Mam module ACLR register
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*
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* @param1 MAM base pointer
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*
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* @param2 idx ACLR register index
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*
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* @param3 u32Value ACLR register value
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*/
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LOCAL_INLINE void Mam_HWA_Set_ACLR(MAM_Type *MAM, uint32_t idx, uint32_t u32Value)
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{
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MAM->ACLR[idx] = u32Value;
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}
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/**
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* @brief Read Mam module ACLR register
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*
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* @param1 MAM base pointer
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*
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* @param2 idx ACLR register index
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*
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* @return ACLR register value
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_ACLR(MAM_Type *MAM, uint32_t idx)
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{
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return MAM->ACLR[idx];
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}
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#ifdef MAM_PORT_MONITOR_SUPPORT
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/**
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* @brief Set the Check Control Register (CCLR) value
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @param u32Value Value to write to the CCLR register
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* - Each bit corresponds to a monitor port (0-31)
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* - Setting a bit enables monitoring for that port
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* - Clearing a bit disables monitoring for that port
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*/
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LOCAL_INLINE void Mam_HWA_Set_CCLR(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->CCLR = u32Value;
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}
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/**
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* @brief Get the current Check Control Register (CCLR) value
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @return uint32_t Current CCLR register value
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* - Each bit represents the enabled state of a monitor port (0-31)
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* - Bit set to 1: monitoring enabled for that port
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* - Bit set to 0: monitoring disabled for that port
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_CCLR(MAM_Type *MAM)
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{
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return MAM->CCLR;
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}
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#endif
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#ifdef MAM_SLAVE_PRIORITY_SUPPORT
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/**
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* @brief Set the Priority Enable Register (PRI_EN) value
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @param u32Value Priority enable configuration value
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* - Each bit (0-31) enables/disables priority arbitration for a slave
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* - Bit set to 1: priority arbitration enabled for corresponding slave
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* - Bit set to 0: round-robin arbitration used for corresponding slave
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*/
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LOCAL_INLINE void Mam_HWA_Set_PRI_EN(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->PRI_EN = MAM_PRIORITY_EN_KEY;
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MAM->PRI_EN = u32Value;
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}
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/**
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* @brief Get the current Priority Enable Register (PRI_EN) value
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @return uint32_t Current PRI_EN register value
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* - Each bit (0-31) represents priority enable state for a slave
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* - Bit set to 1: priority arbitration enabled for corresponding slave
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* - Bit set to 0: round-robin arbitration used for corresponding slave
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_PRI_EN(MAM_Type *MAM)
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{
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return MAM->PRI_EN;
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}
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/**
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* @brief Set Priority ID for Slave Group 0 (slaves 0-7)
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @param u32Value Priority configuration value
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* - Bits [3:0]: Priority master for slave 0
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* - Bits [7:4]: Priority master for slave 1
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* - ... up to Bits [31:28]: Priority master for slave 7
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*/
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LOCAL_INLINE void Mam_HWA_Set_PRI_ID_SLVGRP0(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->PRI_ID_SLVGRP0 = u32Value;
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}
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/**
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* @brief Get current Priority ID for Slave Group 0 (slaves 0-7)
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @return uint32_t Current priority configuration for slaves 0-7
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_PRI_ID_SLVGRP0(MAM_Type *MAM)
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{
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return MAM->PRI_ID_SLVGRP0;
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}
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/**
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* @brief Set Priority ID for Slave Group 1 (slaves 8-15)
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @param u32Value Priority configuration value
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* - Byte 0: Priority master for slave 8 (bits [7:0])
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* - Byte 1: Priority master for slave 9 (bits [15:8])
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* - ... up to Byte 7: Priority master for slave 15 (bits [63:56])
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*/
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LOCAL_INLINE void Mam_HWA_Set_PRI_ID_SLVGRP1(MAM_Type *MAM, uint32_t u32Value)
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{
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MAM->PRI_ID_SLVGRP1 = u32Value;
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}
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/**
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* @brief Get current Priority ID for Slave Group 1 (slaves 8-15)
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*
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* @param MAM Pointer to the MAM peripheral register structure
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* @return uint32_t Current priority configuration for slaves 8-15
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*/
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LOCAL_INLINE uint32_t Mam_HWA_Get_PRI_ID_SLVGRP1(MAM_Type *MAM)
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{
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return MAM->PRI_ID_SLVGRP1;
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}
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#endif
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/** @}*/
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#endif /* #if MAM_INSTANCE_COUNT > 0U */
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#endif
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