860 lines
23 KiB
C
860 lines
23 KiB
C
/**
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* @file HwA_sec.h
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* @author Flagchip
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* @brief FC7xxx sec hardware access layer
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* @version 0.2.0
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* @date 2023-2-7
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*
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* @copyright Copyright (c) 2023 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.2.0 2023-2-7 Flagchip076 N/A First version for FC7300
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******************************************************************************** */
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#ifndef HWA_INCLUDE_HWA_SEC_H_
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#define HWA_INCLUDE_HWA_SEC_H_
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#include "device_header.h"
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/**
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* @addtogroup HwA_SEC
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* @{
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*
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*/
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/* DEN Bit Fields */
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/**
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*@brief Enable the debug module
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* */
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LOCAL_INLINE void SEC_HWA_EnDebug(void)
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{
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SEC->DEN = SEC_DEN_DEN(0X5) ;
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}
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/* FSEC0 Bit Fields */
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/**
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* @brief Get the system security KEY0
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* */
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LOCAL_INLINE uint16_t SEC_HWA_GetSScontrol0(void)
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{
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return (uint16_t)((SEC->FSEC0) & (SEC_FSEC0_SSC0_MASK));
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}
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/* FSEC1 Bit Fields */
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/**
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* @brief Get the system security KEY1
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* */
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LOCAL_INLINE uint16_t SEC_HWA_GetSScontrol1(void)
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{
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return (uint16_t)((SEC->FSEC1) & (SEC_FSEC1_SSC1_MASK));
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}
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/* DCWOR Bit Fields */
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/**
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* @brief Re-enable the Debug mode.
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* @note This register can only be write once. startup_fc4150.s has lock the register.
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* */
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LOCAL_INLINE void SEC_HWA_ReEnDebug(void)
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{
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SEC->DCWOR = ((SEC->DCWOR & (~SEC_DCWOR_DEA_MASK)) | SEC_DCWOR_DEA(0X5));
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}
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/**
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* @brief Get the Re-enable Debug permission.
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* */
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LOCAL_INLINE bool SEC_HWA_GetReEnDebug(void)
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{
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bool ret = false;
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uint8_t dea = (uint8_t)((SEC->DCWOR & (SEC_DCWOR_DEA_MASK)) >> SEC_DCWOR_DEA_SHIFT);
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if (dea == 0x5U)
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{
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ret = true;
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}
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return ret;
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}
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/**
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* @brief Enable the write operation for SEC register.
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* @note This register can only be write once. startup_fc4150.s has lock the register.
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* */
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LOCAL_INLINE void SEC_HWA_WriteUnlock(void)
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{
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SEC->DCWOR = ((SEC->DCWOR & (~SEC_DCWOR_RWL_MASK)) | SEC_DCWOR_RWL(0X5));
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}
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/**
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* @brief Get the sec write permission
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* @return true means allow write. false means forbid write.
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*/
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LOCAL_INLINE bool SEC_HWA_GetWritePer(void)
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{
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bool ret = false;
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uint8_t rwl = (uint8_t)((SEC->DCWOR & (SEC_DCWOR_RWL_MASK)) >> SEC_DCWOR_RWL_SHIFT);
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if ((rwl == 0x5U) || (rwl == 0xFU))
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{
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ret = true;
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}
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return ret;
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}
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/* DEK Bit Fields */
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/**
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* @brief Enable the write operation for SEC register.
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* */
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LOCAL_INLINE void SEC_HWA_ChangeDBK(uint8_t count, uint32_t key)
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{
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SEC->DEK[count] = SEC_DEK_DEK(key) ;
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}
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/* TME Bit Fields */
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/**
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*@brief Enable the Test module
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* */
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LOCAL_INLINE void SEC_HWA_EnTest(void)
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{
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SEC->TME = SEC_TME_TME(0X5) ;
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}
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/* TMEA Bit Fields */
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/**
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* @brief Re-Enable Test mode
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* */
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LOCAL_INLINE void SEC_HWA_ReEnTest(void)
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{
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SEC->TMEA = SEC_TMEA_TMEA(0X5) ;
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}
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/**
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* @brief Get the Re-enable Test permission.
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* */
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LOCAL_INLINE bool SEC_HWA_GetReEnTest(void)
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{
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bool ret = false;
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uint8_t tmea = (uint8_t)((SEC->TMEA & (SEC_TMEA_TMEA_MASK)) >> SEC_TMEA_TMEA_SHIFT);
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if ((tmea == 0x5U) || (tmea == 0xFU))
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{
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ret = true;
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}
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return ret;
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}
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/* TMEK Bit Fields */
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/**
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*@brief write Test re-enable mode key
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*
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*/
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LOCAL_INLINE void SEC_HWA_ReEnTestKey(uint32_t testkey)
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{
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SEC->TMEK = SEC_TMEK_TMEK(testkey) ;
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}
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/* FCR0 Bit Fields */
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/**
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* @brief Enable the Mass Erase
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*/
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LOCAL_INLINE void SEC_HWA_EnME(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_FCR0_MED_MASK)) | SEC_FCR0_MED(0x5));
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}
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/**
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* @brief Enable the Block 0 NVR write .
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*/
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LOCAL_INLINE void SEC_HWA_EnWriteB0NVR(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_FCR0_NWP_MASK)) | SEC_FCR0_NWP(0x5)) ;
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}
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/**
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* @brief Disable the Block 0 NVR write .
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*/
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LOCAL_INLINE void SEC_HWA_DisWriteB0NVR(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_FCR0_NWP_MASK)) | SEC_FCR0_NWP(0xA)) ;
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}
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/**
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* @brief Enable the Block 0 NVR erase .
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*/
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LOCAL_INLINE void SEC_HWA_EnEraseB0NVR(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_FCR0_NEP_MASK)) | SEC_FCR0_NEP(0x5)) ;
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}
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/**
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* @brief Disable the Block 0 NVR erase .
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*/
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LOCAL_INLINE void SEC_HWA_DisEraseB0NVR(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_FCR0_NEP_MASK)) | SEC_FCR0_NEP(0xA)) ;
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}
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/* NKRP Bit Fields */
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/**
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* @brief NVR Key Read Protection.
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* @brief Enable the Block 0 NVR read.
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*/
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LOCAL_INLINE void SEC_HWA_EnReadB0NVR(void)
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{
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SEC->FCR0 = ((SEC->NKRP & (~SEC_NKRP_NKRP_MASK)) | SEC_NKRP_NKRP(0x5)) ;
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}
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/**
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* @brief Disable the Block 0 NVR read .
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*/
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LOCAL_INLINE void SEC_HWA_DisReadB0NVR(void)
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{
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SEC->FCR0 = ((SEC->FCR0 & (~SEC_NKRP_NKRP_MASK)) | SEC_NKRP_NKRP(0xA)) ;
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}
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/* BCS Bit Fields */
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/**
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* @brief Get the Fast Boot Select.
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* @return 0b - Select PLL0 as the core clock source; the core clock is 300MHz
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* 1b - Select FIRC as the core clock source; the core clock is 96MHz.
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetFastBootClock(void)
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{
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return (uint8_t)((SEC->BCS & SEC_BCS_FBS_MASK) >> SEC_BCS_FBS_SHIFT);
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}
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/**
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* @brief NMI Function Enable/Disable
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* @return false - NMI pin function is disabled after reset.
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* true - NMI pin function is enabled
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* */
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LOCAL_INLINE bool SEC_HWA_GetNmiPin(void)
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{
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return (bool)((SEC->BCS & SEC_BCS_NMIDIS_MASK) >> SEC_BCS_NMIDIS_SHIFT);
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}
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/**
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* @brief ISP Function Enable/Disable ISP Mode Status
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* @return false - ISP mode is inactive.
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* true - ISP mode is active.
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* */
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LOCAL_INLINE bool SEC_HWA_GetIspStatus(void)
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{
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return (bool)((SEC->BCS & SEC_BCS_ISPMODE_MASK) >> SEC_BCS_ISPMODE_SHIFT);
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}
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/**
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* @brief Boot Rom Configuration
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* @return false - Boot from GPR defined address (except ROM).
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* true - Boot from ROM.
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* */
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LOCAL_INLINE bool SEC_HWA_GetBootRom(void)
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{
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return (bool)((SEC->BCS & SEC_BCS_BOOTROM_MASK) >> SEC_BCS_BOOTROM_SHIFT);
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}
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/**
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* @brief Get Chip Part Mode
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* @return false - Chip is in FlexCore part mode.
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* true - Chip is in HSM part mode.
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* */
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LOCAL_INLINE bool SEC_HWA_GetPartMode(void)
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{
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return (bool)((SEC->BCS & SEC_BCS_PART_MODE_MASK) >> SEC_BCS_PART_MODE_SHIFT);
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}
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/**
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* @brief Get PF_128BIT_MODE
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* @return false - Chip is in FlexCore part mode.
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* true - Chip is in HSM part mode.
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* */
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LOCAL_INLINE bool SEC_HWA_GetPF128BitMode(void)
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{
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return (bool)((SEC->BCS & SEC_BCS_PF_128BIT_MODE_MASK) >> SEC_BCS_PF_128BIT_MODE_SHIFT);
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}
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/* UKAC Bit Fields */
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/**
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* @brief User Key Access Enable. Only valid under non-secure boot
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* @return true means User key can be read/programmed/erased by host CPU ,false means User key is not available for host cpu
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* */
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LOCAL_INLINE bool SEC_HWA_GetUKAS(void)
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{
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bool ret = false;
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uint8_t uake =(uint8_t)((SEC->UKAC & SEC_UKAC_UKAE_MASK) >> SEC_UKAC_UKAE_SHIFT);
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if ((uake == 0x5U) || (uake == 0xFU))
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{
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ret = true;
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}
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return ret;
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}
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/* BRC0 Bit Fields */
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/**
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* @brief Secure Boot Disable (Value loaded from NVR sector)
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* @return true means Secure boot mode , false means Non secure boot mode.
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*/
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LOCAL_INLINE bool SEC_HWA_GetSB(void)
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{
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bool ret = false;
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uint8_t sbdis = (uint8_t)((SEC->BRC0 & SEC_BRC0_SECURE_BOOT_DIS_MASK) >> SEC_BRC0_SECURE_BOOT_DIS_SHIFT);
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if (sbdis == 0x0u)
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{
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ret = true;
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}
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return ret;
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}
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/**
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* @brief Host Debug Auth Enable. Only valid in secure boot. (Value loaded from NVR sector)
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* @return true means Host debug authentication enable. false means Host debug authentication disable.
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*/
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LOCAL_INLINE bool SEC_HWA_GetDEAUEn(void)
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{
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bool ret = false;
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uint8_t dean = (uint8_t)((SEC->BRC0 & SEC_BRC0_DEBUG_AUTH_EN_MASK) >> SEC_BRC0_DEBUG_AUTH_EN_SHIFT);
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if ((dean == 0x5u) || (dean == 0xFu))
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{
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ret = true;
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}
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return ret;
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}
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/**
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* @brief ISP Auth Enable. Only valid in secure boot. (Value loaded from NVR sector)
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* @return true means ISP authentication enable, false means ISP authentication disable.
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*/
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LOCAL_INLINE bool SEC_HWA_GetISPAU(void)
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{
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bool ret = false;
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uint8_t isp = (uint8_t)((SEC->BRC0 & SEC_BRC0_ISP_AUTH_EN_MASK) >> SEC_BRC0_ISP_AUTH_EN_SHIFT);
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if ((isp == 0x5u) || (isp == 0xFu))
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{
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ret = true;
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}
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return ret;
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}
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/* BRC1 Bit Fields */
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/**
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* @brief Get the FCUART Baud Rate for ISP
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* @return FCUART Baud Rate for ISP
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetUartBR(void)
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{
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return (uint8_t)((SEC->BRC1 & SEC_BRC1_UARTBR_MASK) >> SEC_BRC1_UARTBR_SHIFT);
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}
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/**
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* @brief Get CAN Baud Rate for ISP
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* @return CAN Baud Rate for ISP
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetCanBR(void)
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{
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return (uint8_t)((SEC->BRC1 & SEC_BRC1_CANBR_MASK) >> SEC_BRC1_CANBR_SHIFT);
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}
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/**
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* @brief Get OSC Frequency
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* @return OSC Frequency
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetOSCFre(void)
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{
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return (uint8_t)((SEC->BRC1 & SEC_BRC1_OSCFREQ_MASK) >> SEC_BRC1_OSCFREQ_SHIFT);
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}
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/**
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* @brief Get whether OSC Available.
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* @return true means OSC is available. false means -OSC is not available
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* */
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LOCAL_INLINE bool SEC_HWA_GetOSCAvail(void)
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{
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bool ret = false;
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uint8_t osc = (uint8_t)((SEC->BRC1 & SEC_BRC1_OSCA_MASK) >> SEC_BRC1_OSCA_SHIFT);
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if (osc == 0x0U)
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{
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ret = true;
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}
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return ret;
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}
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/**
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* @brief Get Debug Backdoor Key Input Enable.
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* @return
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* 0011b - User can input DBK through debug mailbox, ISP is not valid
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* 1100b - User can input DBK through ISP, debug mailbox is not valid.
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* 1111b - User can input DBK through both debug mailbox and ISP.
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* Other Values - User cannot input DBK through both debug mailbox andISP
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* */
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LOCAL_INLINE uint32_t SEC_HWA_GetMBBKEN(void)
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{
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return (uint32_t)((SEC->BRC1 & SEC_BRC1_DBK_IN_EN_MASK) >> SEC_BRC1_DBK_IN_EN_SHIFT);
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}
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/**
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* @brief Get Debug Backdoor Key Encryption Algorithm
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* @return false-User code verification enable in non-secure boot mode
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true- User code verification disable in non-secure boot mode.
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* */
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LOCAL_INLINE bool SEC_HWA_GetNonSecVerifEN(void)
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{
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bool ret = false;
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uint8_t dean = (uint8_t)((SEC->BRC0 & SEC_BRC1_NON_SEC_VERIF_EN_MASK) >> SEC_BRC1_NON_SEC_VERIF_EN_SHIFT);
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if (dean == 1u)
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{
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ret = true;
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}
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return ret;
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}
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/**
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* @brief Get User Code Verification Enable under Non-secure Boot Mode
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* @return Bootloader Verification Algorithm
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* 000b - AES256-CBC
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* 111b - SM4-CBC.
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetDBDkeyEncrypAlg(void)
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{
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return (uint8_t)((SEC->BRC1 & SEC_BRC1_DBKEA_MASK) >> SEC_BRC1_DBKEA_SHIFT);
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}
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/**
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* @brief ISP Function Enable/Disable，Only valid in non-secure mode
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* @return false - ISP pin function is disabled after reset.
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* true - ISP pin function is enabled.
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* */
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LOCAL_INLINE bool SEC_HWA_GetIspEn(void)
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{
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return (bool)((SEC->BRC1 & SEC_BRC1_ISP_PIN_EN_MASK) >> SEC_BRC1_ISP_PIN_EN_SHIFT);
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}
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/**
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* @brief GET ISP Mode whether Allowed in Recovery Mode
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* @return false - ISP mode is not allowed in recovery mode
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* true - ISP mode is allowed in recovery mode.
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* */
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LOCAL_INLINE bool SEC_HWA_GetIspIsAllowedInRec(void)
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{
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return (bool)((SEC->BRC1 & SEC_BRC1_ISPAIRM_MASK) >> SEC_BRC1_ISPAIRM_SHIFT);
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}
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/**
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* @brief GET Enable the Output of Plaintext Decrypted ROOT Key
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* @return false - The output of plaintext decrypted ROOT key is enabled
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* true - The output of plaintext decrypted ROOT key is disabled.
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* */
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LOCAL_INLINE bool SEC_HWA_GetKeyPlaRoot(void)
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{
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return (bool)((SEC->BRC1 & SEC_BRC1_KEY_PROT_MASK) >> SEC_BRC1_KEY_PROT_SHIFT);
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}
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/**
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* @brief Get ROM Loop Control Flag
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* @return false - ROM executes normal run under VIRGIN and FT state.
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* true - ROM enters debug loop under VIRGIN and FT state.
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* */
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LOCAL_INLINE bool SEC_HWA_GetLoopCtrFlag(void)
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{
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return (bool)((SEC->BRC1 & SEC_BRC1_ROM_LOOP_CTRL_MASK) >> SEC_BRC1_ROM_LOOP_CTRL_SHIFT);
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}
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/**
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* @brief Get Enable Software Configuration to Enter ISP
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* @return false - Software configuration to enter ISP is enabled.
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* true - Software configuration to enter ISP is disabled.
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* */
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LOCAL_INLINE bool SEC_HWA_GetIspSoftConfig(void)
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{
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return (bool)((SEC->BRC1 & SEC_BRC1_SW_CFG_ISP_EN_MASK) >> SEC_BRC1_SW_CFG_ISP_EN_SHIFT);
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}
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/* SW_CFG_ISP_FLG Bit Fields */
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/**
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* @brief Software Configuration to Enter ISP Flag
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* @return ISP Flag.
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetSwCfgIspFlg(void)
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{
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return (uint8_t)((SEC->SW_CFG_ISP_FLG & SEC_SW_CFG_ISP_FLG_SW_CFG_ISP_FLG_MASK) >> SEC_SW_CFG_ISP_FLG_SW_CFG_ISP_FLG_SHIFT);
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}
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/* BRC2 Bit Fields */
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/**
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* @brief Get USERCODE_VERIFY_MASK_MASK
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* @return USERCODE_VERIFY_MASK_MASK.
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* */
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LOCAL_INLINE uint32_t SEC_HWA_GetBLMask(void)
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{
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return (uint32_t)((SEC->BRC2 & SEC_BRC2_USERCODE_VERIFY_MASK_MASK) >> SEC_BRC2_USERCODE_VERIFY_MASK_SHIFT);
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}
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/**
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* @brief Get the ISP Instance Select.
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* @return ISP Instance Select
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* */
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LOCAL_INLINE uint8_t SEC_HWA_GetIspIns(void)
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{
|
||
return (uint8_t)((SEC->BRC2 & SEC_BRC2_ISP_INST_SEL_MASK) >> SEC_BRC2_ISP_INST_SEL_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Bootloader Verification Algorithm
|
||
* @return Bootloader Verification Algorithm
|
||
* */
|
||
LOCAL_INLINE uint8_t SEC_HWA_GetBLVer(void)
|
||
{
|
||
return (uint8_t)((SEC->BRC2 & SEC_BRC2_USERCODE_VERIFICATION_ALG_MASK) >> SEC_BRC2_USERCODE_VERIFICATION_ALG_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Debug/ISP/PREFA Authentication and USRK decryption algorithm
|
||
* @return 1b - SM2, 0b - ECC256
|
||
* */
|
||
LOCAL_INLINE uint8_t SEC_HWA_GetDecrypt(void)
|
||
{
|
||
return (uint8_t)((SEC->BRC2 & SEC_BRC2_DECRP_ALG_MASK) >> SEC_BRC2_DECRP_ALG_SHIFT);
|
||
}
|
||
|
||
/* IMAGEA Bit Fields */
|
||
/**
|
||
* @brief Get the bootloader address.
|
||
* @return Bootloader Address.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetBLAddr(void)
|
||
{
|
||
return (uint32_t)((SEC->IMGEA & SEC_IMGEA_IMAGE_ADDR_MASK) >> SEC_IMGEA_IMAGE_ADDR_SHIFT);
|
||
}
|
||
|
||
|
||
/* NVR VER Bit Fields */
|
||
/**
|
||
* @brief Get C version.
|
||
* @return C version.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetCVer(void)
|
||
{
|
||
return (uint32_t)((SEC->NVR_VER & SEC_NVR_VER_C_VER_MASK) >> SEC_NVR_VER_C_VER_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Set C version.
|
||
* @return C version.
|
||
* */
|
||
LOCAL_INLINE void SEC_HWA_SetCVer(uint32_t C_Ver)
|
||
{
|
||
SEC->NVR_VER=((SEC->NVR_VER & (~SEC_NVR_VER_C_VER_MASK)) | SEC_NVR_VER_C_VER(C_Ver));
|
||
}
|
||
|
||
/**
|
||
* @brief Get R version.
|
||
* @return R version.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetRVer(void)
|
||
{
|
||
return (uint32_t)((SEC->NVR_VER & SEC_NVR_VER_R_VER_MASK) >> SEC_NVR_VER_R_VER_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Set R version.
|
||
* */
|
||
LOCAL_INLINE void SEC_HWA_SetRVer(uint32_t R_Ver)
|
||
{
|
||
SEC->NVR_VER=((SEC->NVR_VER & (~SEC_NVR_VER_R_VER_MASK)) | SEC_NVR_VER_R_VER(R_Ver));
|
||
}
|
||
|
||
/**
|
||
* @brief Get V version.
|
||
* @return V version.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetVVer(void)
|
||
{
|
||
return (uint32_t)((SEC->NVR_VER & SEC_NVR_VER_V_VER_MASK) >> SEC_NVR_VER_V_VER_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Set V version.
|
||
* */
|
||
LOCAL_INLINE void SEC_HWA_SetVVer(uint32_t V_Ver)
|
||
{
|
||
SEC->NVR_VER=((SEC->NVR_VER & (~SEC_NVR_VER_V_VER_MASK)) | SEC_NVR_VER_V_VER(V_Ver));
|
||
}
|
||
|
||
/**
|
||
* @brief Get CHIP version.
|
||
* @return CHIP version.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetChipVer(void)
|
||
{
|
||
return (uint32_t)((SEC->NVR_VER & SEC_NVR_VER_CHIP_VER_MASK) >> SEC_NVR_VER_CHIP_VER_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Set CHIP version.
|
||
* */
|
||
LOCAL_INLINE void SEC_HWA_SetChipVer(uint32_t CHIP_Ver)
|
||
{
|
||
SEC->NVR_VER=((SEC->NVR_VER & (~SEC_NVR_VER_CHIP_VER_MASK)) | SEC_NVR_VER_V_VER(CHIP_Ver));
|
||
}
|
||
|
||
/* LCSTAT Bit Fields */
|
||
/**
|
||
* @brief Get the life cycle status of the chip.
|
||
* @return The lifecycle status
|
||
* */
|
||
LOCAL_INLINE uint8_t SEC_HWA_GetLCStaus(void)
|
||
{
|
||
return (uint8_t)(SEC->LCSTAT & 0XFFU);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Lifecycle OEM Development
|
||
* @return 0b - Chip is not in this lifecycle
|
||
* 1b - Chip is in this lifecycle
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetLCOemDev(void)
|
||
{
|
||
return (bool)((SEC->LCSTAT & SEC_LCSTAT_LIFECYCLE_OEM_DEV_MASK) >> SEC_LCSTAT_LIFECYCLE_OEM_DEV_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Lifecycle OEM Production
|
||
* @return false - Chip is not in this lifecycle
|
||
* true - Chip is in this lifecycle
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetLCOemPdt(void)
|
||
{
|
||
return (bool)((SEC->LCSTAT & SEC_LCSTAT_LIFECYCLE_OEM_PDT_MASK) >> SEC_LCSTAT_LIFECYCLE_OEM_PDT_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Lifecycle In Field
|
||
* @return false - Chip is not in this lifecycle
|
||
* true - Chip is in this lifecycle
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetLCInField(void)
|
||
{
|
||
return (bool)((SEC->LCSTAT & SEC_LCSTAT_LIFECYCLE_IN_FIELD_MASK) >> SEC_LCSTAT_LIFECYCLE_IN_FIELD_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Lifecycle Software Fault Analysis
|
||
* @return false - Chip is not in this lifecycle
|
||
* true - Chip is in this lifecycle
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetLCSwFa(void)
|
||
{
|
||
return (bool)((SEC->LCSTAT & SEC_LCSTAT_LIFECYCLE_SWFA_MASK) >> SEC_LCSTAT_LIFECYCLE_SWFA_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Lifecycle Hardware Fault Analysis
|
||
* @return false - Chip is not in this lifecycle
|
||
* true - Chip is in this lifecycle
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetLCHwFa(void)
|
||
{
|
||
return (bool)((SEC->LCSTAT & SEC_LCSTAT_LIFECYCLE_HWFA_MASK) >> SEC_LCSTAT_LIFECYCLE_HWFA_SHIFT);
|
||
}
|
||
|
||
/* FAC Bit Fields */
|
||
/**
|
||
* @brief Get the Host User Key Read Protection
|
||
* @return true - Host read access to User Key region is enabled
|
||
* false - Host read access to User Key region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHUKRead(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_UKEY_RPROT_MASK) >> SEC_FAC_HOST_UKEY_RPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the Host User Key write Protection
|
||
* @return true - Host write access to User Key region is enabled
|
||
* false - Host write access to User Key region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHUKWrite(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_UKEY_WPROT_MASK) >> SEC_FAC_HOST_UKEY_WPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the Host User Key erase Protection
|
||
* @return true - Host erase access to User Key region is enabled
|
||
* false - Host erase access to User Key region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHUKErase(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_UKEY_EPROT_MASK) >> SEC_FAC_HOST_UKEY_EPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the Host NVR Read Protection
|
||
* @return true - Host read access to NVR region is enabled
|
||
* false - Host read access to NVR region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHostNvrRead(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_NVR_RPROT_MASK) >> SEC_FAC_HOST_NVR_RPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the Host NVR write Protection
|
||
* @return true - Host write access to NVR region is enabled
|
||
* false - Host write access to NVR region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHostNvrWrite(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_NVR_WPROT_MASK) >> SEC_FAC_HOST_NVR_WPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the Host NVR erase Protection
|
||
* @return true - Host erase access to NVR region is enabled
|
||
* false - Host erase access to NVR region is disabled-
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHostNvrErase(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HOST_NVR_EPROT_MASK) >> SEC_FAC_HOST_NVR_EPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get HSM User Key Read Protection
|
||
* @return true - HSM Read access to User Key region is disabled
|
||
* false - HSM Read access to User Key region is enabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmUKRead(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_UKEY_RPROT_MASK) >> SEC_FAC_HSM_UKEY_RPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get HSM User Key Program Protection
|
||
* @return true - HSM Program access to User Key region is disabled
|
||
* false - HSM Program access to User Key region is enabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmUKProg(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_UKEY_WPROT_MASK) >> SEC_FAC_HSM_UKEY_WPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the HSM User Key Erase Protection
|
||
* @return true - HSM erase access to User Key region is enabled
|
||
* false -HSM erase access to User Key region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmUKErase(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_UKEY_EPROT_MASK) >> SEC_FAC_HSM_UKEY_EPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get HSM NVR Key Read Protection
|
||
* @return true - HSM Read access to NVR key region is disabled
|
||
* false - HSM Read access to NVR key region is enabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmNvrKRead(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_NVR_RPROT_MASK) >> SEC_FAC_HSM_NVR_RPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get HSM NVR Program Protection
|
||
* @return true - HSM Program access to NVR region is disabled
|
||
* false - HSM Program access to NVR region is enabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmNvrProg(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_NVR_WPROT_MASK) >> SEC_FAC_HSM_NVR_WPROT_SHIFT));
|
||
}
|
||
|
||
/**
|
||
* @brief Get the HSM NVR Erase Protection
|
||
* @return true - HSM erase access to NVR region is enabled
|
||
* false -HSM erase access to NVR region is disabled
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetHsmNvrErase(void)
|
||
{
|
||
return (bool)(~(((SEC->FAC) & SEC_FAC_HSM_NVR_EPROT_MASK) >> SEC_FAC_HSM_NVR_EPROT_SHIFT));
|
||
}
|
||
|
||
/* FLEXCORE_EN Bit Fields */
|
||
/**
|
||
* @brief Get the FlexCore Enable.
|
||
* @return true means enable ,false means disable.
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetFlexCoreEn(void)//?
|
||
{
|
||
bool ret = false;
|
||
uint8_t srk = (uint8_t)((SEC->FLEXCORE_EN & SEC_FLEXCORE_EN_FLEXCORE_EN_MASK) >> SEC_FLEXCORE_EN_FLEXCORE_EN_SHIFT);
|
||
if (srk == 0xFU||srk == 0x5U)
|
||
{
|
||
ret = true;
|
||
}
|
||
return ret;
|
||
}
|
||
/**
|
||
* @brief Set the FlexCore Enable.
|
||
* @return true means set sucess ,false means set fail,0x5 and 0xf is enable,others is disable.
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_SetFlexCoreEn(uint8_t CoreEn)
|
||
{
|
||
if(CoreEn>0xF)
|
||
return false;
|
||
SEC->FLEXCORE_EN = ((SEC->FLEXCORE_EN & (~SEC_FLEXCORE_EN_FLEXCORE_EN_MASK)) | SEC_FLEXCORE_EN_FLEXCORE_EN(CoreEn));
|
||
return true;
|
||
}
|
||
|
||
/**
|
||
* @brief Get SEC_FLEXCORE_EN FLEXCORE_DBG.
|
||
* @return true means enable ,false means disable.
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetFlexCoreDbgEn(void)
|
||
{
|
||
return (bool)((SEC->FLEXCORE_EN & SEC_FLEXCORE_EN_FLEXCORE_DBG_EN_MASK) >> SEC_FLEXCORE_EN_FLEXCORE_DBG_EN_SHIFT);
|
||
}
|
||
|
||
/**
|
||
* @brief Set SEC_FLEXCORE_EN FLEXCORE_DBG.
|
||
* */
|
||
LOCAL_INLINE void SEC_HWA_SetFlexCoreDbgEn(uint8_t DbgEn)
|
||
{
|
||
SEC->FLEXCORE_EN=((SEC->FLEXCORE_EN & (~SEC_FLEXCORE_EN_FLEXCORE_DBG_EN_MASK)) | SEC_FLEXCORE_EN_FLEXCORE_DBG_EN(DbgEn));
|
||
}
|
||
|
||
/* FLEX_CODE_ADDR Bit Fields */
|
||
/**
|
||
* @brief Get Code Header Address for FlexCore Always 4-byte aligned
|
||
* @return FLEX Code Header Address.
|
||
* */
|
||
LOCAL_INLINE uint32_t SEC_HWA_GetFlexCodeHeadAddr(void)
|
||
{
|
||
return (uint32_t)((SEC->FLEX_CODE_ADDR & SEC_FLEX_CODE_ADDR_FLEX_CODE_ADDR_MASK) >> SEC_FLEX_CODE_ADDR_FLEX_CODE_ADDR_SHIFT);
|
||
}
|
||
|
||
/* PFLASH_PRLLL_EN Bit Fields */
|
||
/**
|
||
* @brief Get PFLASH Parallel Enable
|
||
* @return
|
||
* 0101b - Disable
|
||
* Others - Enable
|
||
* */
|
||
LOCAL_INLINE bool SEC_HWA_GetPflashPrlllEn(void)
|
||
{
|
||
bool ret = false;
|
||
uint32_t srk=(uint32_t)((SEC->PFLASH_PRLLL_EN & SEC_PFLASH_PRLLL_EN_PFLASH_PRLLL_EN_MASK) >> SEC_PFLASH_PRLLL_EN_PFLASH_PRLLL_EN_SHIFT);
|
||
if (srk !=0x5U)
|
||
{
|
||
ret =true ;
|
||
}
|
||
return ret;
|
||
}
|
||
|
||
/** @}*/ /* HwA_SEC */
|
||
#endif /* HWA_INCLUDE_HWA_SEC_H_ */
|