230 lines
6.0 KiB
C
230 lines
6.0 KiB
C
/**
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* @file HwA_freqm.h
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* @author Flagchip
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* @brief FC7xxx freqm hardware access layer
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* @version 0.1.0
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* @date 2024-01-14
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-14 qxw0100 N/A First version for FC7240
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******************************************************************************** */
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#ifndef _HWA_FREQM_H_
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#define _HWA_FREQM_H_
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#include "device_header.h"
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/**
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* @brief Select the measured clock
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*
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*/
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typedef enum
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{
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MES_RSVD00 = 0U,
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MES_SLOW_CLK = 1U,
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MES_PLL1_FEEDBACK = 2U,
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MES_PLL0_FEEDBACK = 3U,
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MES_SCG_CLKOUT = 4U,
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MES_RTC_CLK = 5U,
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MES_AON_CLK = 6U,
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MES_SIRC128K_CLK = 7U,
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MES_RSVD01 = 8U,
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MES_RSVD02 = 9U,
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MES_FCPIT0_FUN_CLK = 10U,
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MES_RSVD03 = 11U,
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MES_RSVD04 = 12U,
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MES_FCSPI0_FUN_CLK = 13U,
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MES_FCSPI1_FUN_CLK = 14U,
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MES_FCSPI2_FUN_CLK = 15U,
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MES_RSVD05 = 16U,
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MES_FCUART0_FUN_CLK = 17U,
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MES_FCUART1_FUN_CLK = 18U,
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MES_FCUART2_FUN_CLK = 19U,
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MES_RSVD06 = 20U,
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MES_TRGSEL1_OUT4 = 21U,
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MES_FTU0_FUN_CLK = 22U,
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MES_FTU1_FUN_CLK = 23U,
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MES_RSVD07 = 24U,
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MES_FTU2_FUN_CLK = 25U,
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MES_FTU3_FUN_CLK = 26U,
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MES_ADC0_FUN_CLK = 27U,
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MES_RSVD08 = 28U,
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MES_ADC1_FUN_CLK = 29U,
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MES_RSVD09 = 30U,
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MES_RSVD10 = 31U,
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MES_RSVD11 = 32U,
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MES_FOSC_DIVL = 33U,
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MES_SIRC_DIVL = 34U,
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MES_FIRC_DIVL = 35U,
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MES_RSVD12 = 36U,
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MES_PLL1_DIVL = 37U,
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MES_PLL0_DIVL = 38U,
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MES_RSVD13 = 39U,
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MES_RSVD14 = 40U,
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MES_FOSC_DIVM = 41U,
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MES_SIRC_DIVM = 42U,
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MES_FIRC_DIVM = 43U,
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MES_RSVD15 = 44U,
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MES_PLL1_DIVM = 45U,
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MES_PLL0_DIVM = 46U,
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MES_RSVD16 = 47U,
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MES_RSVD17 = 48U,
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MES_FOSC_DIVH = 49U,
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MES_SIRC_DIVH = 50U,
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MES_FIRC_DIVH = 51U,
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MES_RSVD18 = 52U,
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MES_PLL1_DIVH = 53U,
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MES_PLL0_DIVH = 54U,
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MES_RSVD19 = 55U,
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MES_RSVD20 = 56U,
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MES_SENT0_FUN_CLK = 57U,
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MES_FLEXCAN0_FUN_CLK = 58U,
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MES_FLEXCAN1_FUN_CLK = 59U,
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MES_RSVD21 = 60U,
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MES_MSC0_FUN_CLK = 61U,
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MES_TPU_FUN_CLK = 62U,
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MES_RSVD22 = 63U,
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} FREQM_MesClkSelType;
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/**
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* @brief Set the clock selection
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*
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* @param pFreqm the base address of the FREQM
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* @param eClkSel the clock selection index
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*/
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LOCAL_INLINE void FREQM_HWA_MesClkSel(FREQM_Type *pFreqm,FREQM_MesClkSelType eClkSel)
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{
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pFreqm->CTRL &= ~FREQM_CTRL_MES_CLK_SEL_MASK;
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pFreqm->CTRL |= FREQM_CTRL_MES_CLK_SEL((uint32_t)eClkSel);
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}
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/**
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* @brief Set the clock selection
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*
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* @param pFreqm the base address of the FREQM
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* @param u8PredivVal the measure clock prediv value
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*/
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LOCAL_INLINE void FREQM_HWA_MesClk_PreDiv(FREQM_Type *pFreqm,uint8_t u8PredivVal)
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{
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pFreqm->CTRL &= ~FREQM_CTRL_MES_CLK_PREDIV_MASK;
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pFreqm->CTRL |= FREQM_CTRL_MES_CLK_PREDIV(u8PredivVal);
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}
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/**
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* @brief Enable count event interrupt
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*
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* @param pFreqm the base address of the FREQM
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*/
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LOCAL_INLINE void FREQM_HWA_EnableCntEventInterrupt(FREQM_Type *pFreqm)
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{
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pFreqm->CTRL |= FREQM_CTRL_CNT_EVENT_IE_MASK;
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}
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/**
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* @brief Disable count event interrupt
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*
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* @param pFreqm the base address of the FREQM
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*/
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LOCAL_INLINE void FREQM_HWA_DisableCntEventInterrupt(FREQM_Type *pFreqm)
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{
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pFreqm->CTRL &= ~((uint32_t)FREQM_CTRL_CNT_EVENT_IE_MASK);
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}
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/**
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* @brief Set counting length of measure counter
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*
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* @param pFreqm the base address of the FREQM
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* @param u32MesLen counting length of measure counter
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*/
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LOCAL_INLINE void FREQM_HWA_SetMesLength(FREQM_Type *pFreqm,uint32_t u32MesLen)
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{
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pFreqm->MES_LENGTH = u32MesLen;
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}
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/**
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* @brief Set timeout value of reference counter
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*
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* @param pFreqm the base address of the FREQM
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* @param u32RefTo timeout value of reference counter
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*/
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LOCAL_INLINE void FREQM_HWA_SetRefTimeout(FREQM_Type *pFreqm,uint32_t u32RefTo)
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{
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pFreqm->REF_TIMEOUT = u32RefTo;
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}
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/**
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* @brief Set value of reference counter
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*
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* @param pFreqm the base address of the FREQM
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* @param u32RefCnt value of reference counter
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*/
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LOCAL_INLINE void FREQM_HWA_SetRefCnt(FREQM_Type *pFreqm,uint32_t u32RefCnt)
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{
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pFreqm->REF_CNT = u32RefCnt;
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}
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/**
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* @brief Clear counter event interrupt flag
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*
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* @param pFreqm the base address of the FREQM
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*/
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LOCAL_INLINE void FREQM_HWA_ClearInterruptFlag(FREQM_Type *pFreqm)
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{
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pFreqm->CNT_STATUS |= FREQM_CNT_STATUS_CNT_EVENT_MASK;
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}
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/**
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* @brief Get counter event interrupt flag
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*
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* @param pFreqm the base address of the FREQM
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* @param return false for disable, true for enable.
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*/
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LOCAL_INLINE bool FREQM_HWA_GetInterruptFlag(FREQM_Type *pFreqm)
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{
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return ((pFreqm->CNT_STATUS & FREQM_CNT_STATUS_CNT_EVENT_MASK) == FREQM_CNT_STATUS_CNT_EVENT_MASK) ? true : false;
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}
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/**
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* @brief Get counter status
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*
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* @param pFreqm the base address of the FREQM
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* @param return Counter status.
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*/
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LOCAL_INLINE uint32_t FREQM_HWA_GetCntStatus(FREQM_Type *pFreqm)
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{
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uint32_t u32Mask = (FREQM_CNT_STATUS_MES_CNT_START_MASK|FREQM_CNT_STATUS_MES_CNT_STOP_MASK|FREQM_CNT_STATUS_REF_CNT_STOP_MASK);
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return (pFreqm->CNT_STATUS & u32Mask);
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}
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/**
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* @brief Set value of measure counter
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*
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* @param pFreqm the base address of the FREQM
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* @param u32MesCnt value of measure counter
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*/
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LOCAL_INLINE void FREQM_HWA_SetMesCnt(FREQM_Type *pFreqm,uint32_t u32MesCnt)
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{
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pFreqm->MES_CNT = u32MesCnt;
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}
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/**
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* @brief Get saved reference counter value
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*
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* @param pFreqm the base address of the FREQM
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* @param return saved reference counter value.
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*/
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LOCAL_INLINE uint32_t FREQM_HWA_GetRefCntSave(FREQM_Type *pFreqm)
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{
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return pFreqm->REF_CNT_SAVE;
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}
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#endif /* #ifndef _HWA_FREQM_H_ */
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