53 lines
1.8 KiB
C
53 lines
1.8 KiB
C
/**
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* @file HwA_fpu.h
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* @author Flagchip051
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* @brief FC4xxx FPU hardware access layer
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* @version 0.1.0
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* @date 2024-01-11
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-11 Flagchip054 N/A First version for FC7240
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******************************************************************************** */
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#ifndef _HWA_FPU_H_
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#define _HWA_FPU_H_
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#include "device_header.h"
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/* CPACR Bit Fields */
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#define FC7240_SCB_CPACR_CP10_MASK 0x300000u
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#define FC7240_SCB_CPACR_CP10_SHIFT 20u
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#define FC7240_SCB_CPACR_CP10_WIDTH 2u
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#define FC7240_SCB_CPACR_CP10(x) (((uint32_t)(((uint32_t)(x))<<FC7240_SCB_CPACR_CP10_SHIFT))&FC7240_SCB_CPACR_CP10_MASK)
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#define FC7240_SCB_CPACR_CP11_MASK 0xC00000u
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#define FC7240_SCB_CPACR_CP11_SHIFT 22u
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#define FC7240_SCB_CPACR_CP11_WIDTH 2u
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#define FC7240_SCB_CPACR_CP11(x) (((uint32_t)(((uint32_t)(x))<<FC7240_SCB_CPACR_CP11_SHIFT))&FC7240_SCB_CPACR_CP11_MASK)
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/**
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* @brief enable fpu
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*
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*/
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LOCAL_INLINE void FPU_HWA_Enable(void)
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{
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SCB->CPACR |= (FC7240_SCB_CPACR_CP10(3) | FC7240_SCB_CPACR_CP11(3)); /* set CP10 and CP11 Full Access */
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}
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/**
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* @brief disable fpu
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*
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*/
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LOCAL_INLINE void FPU_HWA_Disable(void)
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{
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SCB->CPACR &= ~((FC7240_SCB_CPACR_CP10(3) | FC7240_SCB_CPACR_CP11(3))); /* Access denied. Any attempted access generates a NOCP UsageFault */
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}
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#endif /* HWA_INCLUDE_HWA_FPU_H_ */
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