672 lines
15 KiB
C
672 lines
15 KiB
C
/**
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* @file HwA_fcsmu.h
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* @author Flagchip
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* @brief FC7xxx FCSMU hardware access layer
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* @version 0.1.0
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* @date 2024-01-14
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*
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* @copyright Copyright (c) 2024 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-14 qxw0100 N/A First version for FC7240
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******************************************************************************** */
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#ifndef _HWA_FCSMU_H_
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#define _HWA_FCSMU_H_
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#include "device_header.h"
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/**
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* @addtogroup HwA_fcsmu
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* @{
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*
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*/
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/********* macros ************/
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typedef enum
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{
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FCSMU_OPC_NONE = 0U, /*!< FCSMU operation code none */
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FCSMU_OPC_MOVE_TO_CONFIG = 1U, /*!< FCSMU operation code move to configuration state */
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FCSMU_OPC_MOVE_TO_NORMAL = 2U, /*!< FCSMU operation code move to normal state */
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FCSMU_OPC_CLEAR_FAULT_IMFO = 13U, /*!< FCSMU operation code clear fault channel information register */
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FCSMU_OPC_CLEAR_OPS_TO_IDLE = 15U, /*!< FCSMU operation code clear ops to idle */
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FCSMU_OPC_LOAD_NVR_CONFIG = 31U /*!< FCSMU operation code load configuration from nvr */
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} FCSMU_OperationCodeType;
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typedef enum
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{
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FCSMU_Crc_STATE_IDLE = 0U, /*!< FCSMU crc status idle */
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FCSMU_Crc_STATE_BUSY = 1U /*!< FCSMU crc status busy */
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} FCSMU_CrcStatusType;
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/********* Local typedef ************/
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/********* Local inline function ************/
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/********* FCSMU Register interface ************/
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/**
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* @brief Set the fcsmu CTRL register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value The register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetCrtl(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->CTRL = u32Value;
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}
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/**
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* @brief Get the fcsmu CTRL register
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*
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* @param pFcsmu FCSMU Instance
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* @return CTRL register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetCtrl(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->CTRL;
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}
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/**
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* @brief Get the fcsmu CTRL register OPS
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*
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* @param pFcsmu FCSMU Instance
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* @return CTRL register OPS value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetCtrlOps(FCSMU_Type *const pFcsmu)
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{
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return ((pFcsmu->CTRL & FCSMU_CTRL_OPS_MASK) >> FCSMU_CTRL_OPS_SHIFT);
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}
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/**
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* @brief Set the fcsmu OPRK register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value The register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetOprk(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->OPRK = u32Value;
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}
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/**
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* @brief Set the fcsmu SOCTRL register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value The register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetSoctrl(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->SOCTRL = u32Value;
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}
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/**
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* @brief Get the fcsmu SOCTRL register
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*
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* @param pFcsmu FCSMU Instance
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* @return SOCTRL register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetSoctrl(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->SOCTRL;
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}
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/**
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* @brief Set the fcsmu FCCR0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FCCR0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFccr0(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FCCR0 = u32Value;
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}
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/**
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* @brief Get the fcsmu FCCR0 register
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*
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* @param pFcsmu FCSMU Instance
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* @return FCCR0 register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetFccr0(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->FCCR0;
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}
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/**
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* @brief Set the fcsmu FRST0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FRST0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFRST0(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FRST0 = u32Value;
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}
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/**
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* @brief Get the fcsmu FRST0 register
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*
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* @param pFcsmu FCSMU Instance
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* @return FRST0 register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetFRST0(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->FRST0;
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}
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/**
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* @brief Set the fcsmu FST0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FST0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFst0(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FST0 = u32Value;
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}
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/**
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* @brief Get the fcsmu FST0 register
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*
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* @param pFcsmu FCSMU Instance
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* @return FST0 register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetFst0(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->FST0;
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}
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/**
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* @brief Set the fcsmu FST_UNLK register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FST_UNLK register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFunlk(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FST_UNLK = u32Value;
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}
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/**
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* @brief Set the fcsmu FE0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FE0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFe0(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FE0 = u32Value;
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}
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/**
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* @brief Get the fcsmu FE0 register
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*
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* @param pFcsmu FCSMU Instance
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* @return FE0 register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetFE0(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->FE0;
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}
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/**
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* @brief Set the fcsmu WARNING_EN0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value WARNING_EN0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetWarningEn0(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->WARNING_EN0 = u32Value;
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}
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/**
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* @brief Get the fcsmu WARNING_EN0 register
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*
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* @param pFcsmu FCSMU Instance
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* @return WARNING_EN0 register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetWarningEn0(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->WARNING_EN0;
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}
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/**
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* @brief Set the fcsmu WARNING_TO register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value WARNING_TO register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetWaringTo(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->WARNING_TO = u32Value;
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}
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/**
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* @brief Get the fcsmu WARNING_TO register
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*
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* @param pFcsmu FCSMU Instance
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* @return WARNING_TO register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetWaringTo(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->WARNING_TO;
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}
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/**
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* @brief Set the fcsmu CFG_TO register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value CFG_TO register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetCfgTo(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->CFG_TO = u32Value;
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}
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/**
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* @brief Get the fcsmu CFG_TO register
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*
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* @param pFcsmu FCSMU Instance
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* @return CFG_TO register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetCfgTo(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->CFG_TO;
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}
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/**
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* @brief Set the fcsmu SOUT_DIAG register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value SOUT_DIAG register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetSoutDiag(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->SOUT_DIAG = u32Value;
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}
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/**
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* @brief Get the fcsmu SOUT_DIAG register
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*
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* @param pFcsmu FCSMU Instance
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* @return SOUT_DIAG register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetSoutDiag(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->SOUT_DIAG;
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}
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/**
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* @brief Get the fcsmu STATUS register
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*
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* @param pFcsmu FCSMU Instance
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* @return STATUS register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetStatus(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->STATUS;
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}
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/**
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* @brief Get the fcsmu STATUS register FIF value
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*
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* @param pFcsmu FCSMU Instance
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* @return STATUS register FIF value
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*/
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LOCAL_INLINE bool FCSMU_HWA_GetFaultState(FCSMU_Type *const pFcsmu)
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{
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return (pFcsmu->STATUS & FCSMU_STATUS_FIF_MASK) == FCSMU_STATUS_FIF_MASK ? true : false;
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}
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/**
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* @brief Get the fcsmu STATUS register STAT value
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*
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* @param pFcsmu FCSMU Instance
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* @return STATUS register STAT value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetState(FCSMU_Type *const pFcsmu)
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{
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return (pFcsmu->STATUS & FCSMU_STATUS_STAT_MASK) >> FCSMU_STATUS_STAT_SHIFT;
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}
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/**
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* @brief Get the fcsmu NTW register
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*
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* @param pFcsmu FCSMU Instance
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* @return NTW register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetNtw(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->NTW;
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}
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/**
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* @brief Get the fcsmu WTF register
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*
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* @param pFcsmu FCSMU Instance
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* @return WTF register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetWtf(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->WTF;
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}
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/**
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* @brief Get the fcsmu NTF register
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*
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* @param pFcsmu FCSMU Instance
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* @return NTF register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetNtf(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->NTF;
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}
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/**
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* @brief Get the fcsmu FTW register
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*
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* @param pFcsmu FCSMU Instance
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* @return FTW register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetFtw(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->FTW;
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}
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/**
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* @brief Set the fcsmu INJECT register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value INJECT register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetInject(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->INJECT = u32Value;
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}
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/**
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* @brief Get the fcsmu IRQ_STAT register
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*
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* @param pFcsmu FCSMU Instance
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* @return IRQ_STAT register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetIrqStat(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->IRQ_STAT;
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}
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/**
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* @brief Set the fcsmu IRQ_STAT register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value IRQ_STAT register value
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*/
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LOCAL_INLINE void FCSMU_HWA_ClearCfgToIrq(FCSMU_Type *const pFcsmu)
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{
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pFcsmu->IRQ_STAT |= FCSMU_IRQ_STAT_CFG_TO_IRQ_MASK;
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}
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/**
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* @brief Set the fcsmu IRQ_EN register
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*
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* @param pFcsmu FCSMU Instance
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* @param bEnable IRQ_EN register value
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*/
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LOCAL_INLINE void FCSMU_HWA_EnableCfgToIrq(FCSMU_Type *const pFcsmu, bool bEnable)
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{
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pFcsmu->IRQ_EN = (pFcsmu->IRQ_EN & ~FCSMU_IRQ_STAT_CFG_TO_IRQ_MASK) | FCSMU_IRQ_EN_CFG_TO_IEN(bEnable);
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}
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/**
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* @brief Set the fcsmu TEMP_UNLK register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value TEMP_UNLK register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetTempUnlk(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->TEMP_UNLK = u32Value;
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}
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/**
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* @brief Set the fcsmu PERMNT_LOCK register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value PERMNT_LOCK register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetPermntLock(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->PERMNT_LOCK = u32Value;
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}
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/**
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* @brief Set the fcsmu STMR register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value STMR register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetStmr(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->STMR = u32Value;
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}
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/**
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* @brief Set the fcsmu WARNING_IEN0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value WARNING_IEN0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetWarningIen(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->WARNING_IEN0 = u32Value;
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}
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/**
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* @brief Set the fcsmu FAULT_IEN0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value FAULT_IEN0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetFaultIen(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->FAULT_IEN0 = u32Value;
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}
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/**
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* @brief Set the fcsmu SOUT_EN0 register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value SOUT_EN0 register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetSoutEn(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->SOUT_EN0 = u32Value;
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}
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/**
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* @brief Get the fcsmu WARNING_TMR register
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*
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* @param pFcsmu FCSMU Instance
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* @return WARNING_TMR register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetWarningTmr(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->WARNING_TMR;
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}
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/**
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* @brief Get the fcsmu SM_TMR register
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*
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* @param pFcsmu FCSMU Instance
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* @return SM_TMR register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetSafeModeTmr(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->SM_TMR;
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}
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/**
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* @brief Get the fcsmu CFG_TMR register
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*
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* @param pFcsmu FCSMU Instance
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* @return CFG_TMR register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetConfigTmr(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->CFG_TMR;
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}
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/**
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* @brief Get the fcsmu SOUT_TMR register
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*
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* @param pFcsmu FCSMU Instance
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* @return SOUT_TMR register value
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*/
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LOCAL_INLINE uint32_t FCSMU_HWA_GetSoutTmr(FCSMU_Type *const pFcsmu)
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{
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return pFcsmu->SOUT_TMR;
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}
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/**
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* @brief Set the fcsmu CRC_CTRL register
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*
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* @param pFcsmu FCSMU Instance
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* @param u32Value CRC_CTRL register value
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*/
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LOCAL_INLINE void FCSMU_HWA_SetCrcCtrl(FCSMU_Type *const pFcsmu, uint32_t u32Value)
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{
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pFcsmu->CRC_CTRL = u32Value;
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}
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/**
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* @brief Get the fcsmu CRC_CTRL register BUSY value
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*
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* @param pFcsmu FCSMU Instance
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* @return BUSY value
|
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*/
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LOCAL_INLINE bool FCSMU_HWA_GetCrcBusy(FCSMU_Type *const pFcsmu)
|
|
{
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return (pFcsmu->CRC_CTRL & FCSMU_CRC_CTRL_BUSY_MASK) == FCSMU_CRC_CTRL_BUSY_MASK ? true : false;
|
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}
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|
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/**
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* @brief Get the fcsmu CRC_CTRL register EF value
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|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @return EF value
|
|
*/
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LOCAL_INLINE bool FCSMU_HWA_GetCrcErrorFlag(FCSMU_Type *const pFcsmu)
|
|
{
|
|
return (pFcsmu->CRC_CTRL & FCSMU_CRC_CTRL_EF_MASK) == FCSMU_CRC_CTRL_EF_MASK ? true : false;
|
|
}
|
|
|
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/**
|
|
* @brief Clear the fcsmu CRC_CTRL register EF
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @param u32Value CRC_CTRL register value
|
|
*/
|
|
LOCAL_INLINE void FCSMU_HWA_ClearCrcErrorFlag(FCSMU_Type *const pFcsmu)
|
|
{
|
|
pFcsmu->CRC_CTRL |= FCSMU_CRC_CTRL_EF_MASK;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the fcsmu CRC_CTRL register
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @param u32Value CRC_CTRL register value
|
|
*/
|
|
LOCAL_INLINE void FCSMU_HWA_EnableErrorOutput(FCSMU_Type *const pFcsmu, bool bEnable)
|
|
{
|
|
pFcsmu->CRC_CTRL = (pFcsmu->CRC_CTRL & ~FCSMU_CRC_CTRL_EOEN_MASK) | FCSMU_CRC_CTRL_EOEN(bEnable);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the fcsmu CRC_CTRL register EOEN value
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @return EOEN value
|
|
*/
|
|
LOCAL_INLINE bool FCSMU_HWA_GetCrcErrorOutputEnable(FCSMU_Type *const pFcsmu)
|
|
{
|
|
return (pFcsmu->CRC_CTRL & FCSMU_CRC_CTRL_EOEN_MASK) == FCSMU_CRC_CTRL_EOEN_MASK ? true : false;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the fcsmu CRC_CTRL register
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @param bEnable CRC_CTRL register value
|
|
*/
|
|
LOCAL_INLINE void FCSMU_HWA_EnableCrcChecker(FCSMU_Type *const pFcsmu, bool bEnable)
|
|
{
|
|
pFcsmu->CRC_CTRL = (pFcsmu->CRC_CTRL & ~FCSMU_CRC_CTRL_CHKEN_MASK) | FCSMU_CRC_CTRL_CHKEN(bEnable);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the fcsmu CRC_CTRL register CHKEN value
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @return CHKEN value
|
|
*/
|
|
LOCAL_INLINE bool FCSMU_HWA_GetCrcCheckerEnable(FCSMU_Type *const pFcsmu)
|
|
{
|
|
return (pFcsmu->CRC_CTRL & FCSMU_CRC_CTRL_CHKEN_MASK) == FCSMU_CRC_CTRL_CHKEN_MASK ? true : false;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the fcsmu CRC_CTRL register
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @param bEnable CRC_CTRL register value
|
|
*/
|
|
LOCAL_INLINE void FCSMU_HWA_EnableTrigger(FCSMU_Type *const pFcsmu, bool bEnable)
|
|
{
|
|
pFcsmu->CRC_CTRL = (pFcsmu->CRC_CTRL & ~FCSMU_CRC_CTRL_TRGEN_MASK) | FCSMU_CRC_CTRL_TRGEN(bEnable);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the fcsmu CRC_CTRL register TRGEN value
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @return TRGEN value
|
|
*/
|
|
LOCAL_INLINE bool FCSMU_HWA_GetTriggerEnable(FCSMU_Type *const pFcsmu)
|
|
{
|
|
return (pFcsmu->CRC_CTRL & FCSMU_CRC_CTRL_TRGEN_MASK) == FCSMU_CRC_CTRL_TRGEN_MASK ? true : false;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the fcsmu CRC_CTRL register
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
*/
|
|
LOCAL_INLINE void FCSMU_HWA_GenerateCrc(FCSMU_Type *const pFcsmu)
|
|
{
|
|
pFcsmu->CRC_CTRL |= FCSMU_CRC_CTRL_GEN(true);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the fcsmu CRC_RES register
|
|
*
|
|
* @param pFcsmu FCSMU Instance
|
|
* @return CRC_RES register value
|
|
*/
|
|
LOCAL_INLINE uint32_t FCSMU_HWA_GetCrcResult(FCSMU_Type *const pFcsmu)
|
|
{
|
|
return pFcsmu->CRC_RES;
|
|
}
|
|
|
|
/** @}*/ /* HwA_fcsmu */
|
|
|
|
#endif /* #ifndef _HWA_FCSMU_H_ */
|