413 lines
10 KiB
C
413 lines
10 KiB
C
/**
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* @file HwA_fcpit.h
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* @author Flagchip
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* @brief FC7xxx FCPIT hardware access layer
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* @version 0.1.0
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* @date 2024-01-10
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*
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* @copyright Copyright (c) 2023 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-10 Flagchip076 N/A First version for FC7240
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******************************************************************************** */
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#ifndef _HWA_FCPIT_H_
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#define _HWA_FCPIT_H_
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#include "device_header.h"
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/********* Local typedef ************/
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/** @brief Fcpit counter mode, the default mode is 32bit periodic count mode */
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typedef enum
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{
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FCPIT_32PERIODIC_COUNTER = 0,
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FCPIT_DUAL_16PERIODIC_COUNTER,
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FCPIT_ACCUMULATOR,
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FCPIT_32InputCaptue,
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} FCPIT_TimerModeType;
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/** @brief Fcpit channel number */
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typedef enum
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{
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FCPIT_CHANNEL_0 = 0U,
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FCPIT_CHANNEL_1,
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FCPIT_CHANNEL_2,
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FCPIT_CHANNEL_3
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} FCPIT_ChannelType;
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/********* Local inline function ************/
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/**
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* @brief Set FCPIT channel value
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*
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* @param eChannel FCPIT channel number
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* @param u32RegValue Timer value
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelValue(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel, uint32_t u32RegValue)
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{
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pFcpit->CONTROLS[eChannel].TVAL = u32RegValue;
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}
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/**
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* @brief read FCPIT channel value
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*
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* @param eChannel FCPIT channel number
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* @return Timer value
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*/
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LOCAL_INLINE uint32_t FCPIT_HWA_ReadChannelValue(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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return (uint32_t)(pFcpit->CONTROLS[eChannel].TVAL );
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}
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/**
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* @brief Configure FCPIT channel
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*
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* @param eChannel FCPIT channel number
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* @param u32RegValue TCTRL register value
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*/
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LOCAL_INLINE void FCPIT_HWA_ConfigChannel(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel, uint32_t u32RegValue)
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{
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pFcpit->CONTROLS[eChannel].TCTRL = u32RegValue;
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}
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/**
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* @brief Configure FCPIT module
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*
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* @param u32RegValue MCR register value
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*/
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LOCAL_INLINE void FCPIT_HWA_ConfigModule(FCPIT_Type *pFcpit, uint32_t u32RegValue)
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{
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pFcpit->MCR = u32RegValue;
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}
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/**
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* @brief Read FCPIT module enable
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*
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* @return MCR register with FCPIT_MCR_M_CEN_MASK
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*/
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LOCAL_INLINE uint32_t FCPIT_HWA_ReadModuleEnable(FCPIT_Type *pFcpit)
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{
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return (uint32_t)(pFcpit->MCR & FCPIT_MCR_M_CEN_MASK);
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}
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/**
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* @brief Read FCPIT channel
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*
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* @param eChannel Channel number
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* @return TCTRL register with FCPIT_TCTRL_T_EN_MASK
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*/
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LOCAL_INLINE uint32_t FCPIT_HWA_ReadChannelEnable(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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return (uint32_t)(pFcpit->CONTROLS[eChannel].TCTRL & FCPIT_TCTRL_T_EN_MASK);
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}
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/**
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* @brief Read FCPIT active interrupt flag
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*
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* @return FCPIT active interrupt flag
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*/
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LOCAL_INLINE uint32_t FCPIT_HWA_ReadInterruptFlag(FCPIT_Type *pFcpit)
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{
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return (pFcpit->MSR);
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}
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/**
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* @brief Read FCPIT enable interrupt flag
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*
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* @return FCPIT enable interrupt flag
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*/
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LOCAL_INLINE uint32_t FCPIT_HWA_ReadEnableInterruptFlag(FCPIT_Type *pFcpit)
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{
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return (pFcpit->MIER);
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}
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/**
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* @brief Set FCPIT channel running on debug mode
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelRunOnDebug(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR |= FCPIT_MCR_DBG_EN_MASK;
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}
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/**
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* @brief Set FCPIT channel running on low power mode
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelRunOnLpm(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR |= FCPIT_MCR_LPM_EN_MASK;
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}
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/**
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* @brief Enable FCPIT module
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_EnableModule(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR |= FCPIT_MCR_M_CEN_MASK;
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}
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/**
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* @brief Enable FCPIT channel(n) interrupt
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*
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* @param u32RegValue u32RegValue 0-3 bit indicate TIE0-TIE3
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*/
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LOCAL_INLINE void FCPIT_HWA_EnableChannelsInterrupt(FCPIT_Type *pFcpit, uint32_t u32RegValue)
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{
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pFcpit->MIER |= u32RegValue;
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}
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/**
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* @brief Enable FCPIT channel
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_EnableChannel(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_T_EN_MASK;
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}
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/**
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* @brief Enable FCPIT channel
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_SetTimerEnable(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->SETTEN |= (FCPIT_SETTEN_SET_T_EN_0_MASK << (uint32_t)eChannel);
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}
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/**
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* @brief Disable FCPIT channel
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearTimerEnable(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CLRTEN |= (FCPIT_CLRTEN_CLR_T_EN_0_MASK << (uint32_t)eChannel);
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}
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/**
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* @brief Enable FCPIT channel(n) chain mode
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_EnableChannelChainMode(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_CHAIN_MASK;
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}
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/**
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* @brief Configure FCPIT channel operation mode
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*
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* @param eChannel FCPIT channel number
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* @param eMode FCPIT operation mode
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*/
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LOCAL_INLINE void FCPIT_HWA_ConfigChannelMode(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel, FCPIT_TimerModeType eMode)
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{
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uint32_t u32RegValue = pFcpit->CONTROLS[eChannel].TCTRL;
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pFcpit->CONTROLS[eChannel].TCTRL = (u32RegValue & ~(uint32_t)FCPIT_TCTRL_MODE_MASK) | FCPIT_TCTRL_MODE(eMode);
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}
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/**
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* @brief Set FCPIT channel start on trigger
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelStartOnTrig(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_TSOT_MASK;
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}
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/**
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* @brief Set FCPIT channel stop on interrupt
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelStopOnInterrupt(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_TSOI_MASK;
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}
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/**
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* @brief Set FCPIT channel reload on trigger
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelReloadOnTrig(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_TROT_MASK;
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}
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/**
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* @brief Set FCPIT channel trigger source
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelTriggerSrc(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL |= FCPIT_TCTRL_TRG_SRC_MASK;
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}
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/**
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* @brief Select FCPIT channel trigger
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*
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* @param eChannel FCPIT channel number
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* @param u8SelChannel Select channel, range is 0-3
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*/
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LOCAL_INLINE void FCPIT_HWA_SelectChannelTrigger(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel, uint8_t u8SelChannel)
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{
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uint32_t u32RegValue = pFcpit->CONTROLS[eChannel].TCTRL;
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pFcpit->CONTROLS[eChannel].TCTRL = (u32RegValue & ~(uint32_t)FCPIT_TCTRL_TRG_SEL_MASK) |
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FCPIT_TCTRL_TRG_SEL(u8SelChannel);
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}
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/**
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* @brief Set FCPIT channel stop on debug mode
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelStopOnDebug(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR &= ~(uint32_t)FCPIT_MCR_DBG_EN_MASK;
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}
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/**
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* @brief Set FCPIT channel stop on low power mode
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_SetChannelStopOnLpm(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR &= ~(uint32_t)FCPIT_MCR_LPM_EN_MASK;
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}
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/**
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* @brief Disable FCPIT module
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*
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*/
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LOCAL_INLINE void FCPIT_HWA_DisableModule(FCPIT_Type *pFcpit)
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{
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pFcpit->MCR &= ~(uint32_t)FCPIT_MCR_M_CEN_MASK;
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}
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/**
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* @brief Clear FCPIT channel(n) interrupt flag
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*
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* @param u32RegValue 0-3 bit indicate TIF0-TIF3
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelsInterruptFlag(FCPIT_Type *pFcpit, uint32_t u32RegValue)
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{
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pFcpit->MSR |= u32RegValue;
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}
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/**
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* @brief Disable FCPIT channel(n) interrupt
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*
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* @param u32RegValue u32RegValue 0-3 bit indicate TIE0-TIE3
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*/
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LOCAL_INLINE void FCPIT_HWA_DisableChannelsInterrupt(FCPIT_Type *pFcpit, uint32_t u32RegValue)
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{
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pFcpit->MIER &= ~u32RegValue;
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}
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/**
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* @brief Disable FCPIT channel
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_DisableChannel(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_T_EN_MASK;
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}
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/**
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* @brief Disable FCPIT channel chain mode
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_DisableChannelChainMode(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_CHAIN_MASK;
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}
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/**
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* @brief Clear FCPIT channel operation mode
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelMode(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_MODE_MASK;
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}
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/**
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* @brief read FCPIT channel operation mode
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE uint32 FCPIT_HWA_ReadChannelMode(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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return (uint32) ((pFcpit->CONTROLS[eChannel].TCTRL & (uint32_t)FCPIT_TCTRL_MODE_MASK) >>FCPIT_TCTRL_MODE_SHIFT);
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}
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/**
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* @brief Clear FCPIT channel start on trigger
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelStartOnTrig(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_TSOT_MASK;
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}
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/**
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* @brief Clear FCPIT channel stop on interrupt
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelStopOnInterrupt(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_TSOI_MASK;
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}
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/**
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* @brief Clear FCPIT channel reload on trigger
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelReloadOnTrig(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_TROT_MASK;
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}
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/**
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* @brief Clear FCPIT channel trigger source
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelTriggerSrc(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_TRG_SRC_MASK;
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}
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/**
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* @brief Clear FCPIT channel trigger select
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*
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* @param eChannel FCPIT channel number
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*/
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LOCAL_INLINE void FCPIT_HWA_ClearChannelTriggerSelect(FCPIT_Type *pFcpit, FCPIT_ChannelType eChannel)
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{
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pFcpit->CONTROLS[eChannel].TCTRL &= ~(uint32_t)FCPIT_TCTRL_TRG_SEL_MASK;
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}
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#endif /* #ifndef _HWA_FCPIT_H_ */
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