300 lines
7.3 KiB
C
300 lines
7.3 KiB
C
/**
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* @file HwA_aontimer.h
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* @author Flagchip
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* @brief FC7xxx aontimer hardware access layer
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* @version 0.1.0
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* @date 2024-01-10
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*
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* @copyright Copyright (c) 2023 Flagchip Semiconductors Co., Ltd.
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*
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* @details
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*/
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/* ********************************************************************************
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* Revision History:
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*
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* Version Date Initials CR# Descriptions
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* --------- ---------- ------------ ---------- ---------------
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* 0.1.0 2024-01-10 Flagchip076 N/A First version for FC7240
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******************************************************************************** */
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#ifndef HWA_INCLUDE_HWA_AONTIMER_H_
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#define HWA_INCLUDE_HWA_AONTIMER_H_
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#include "device_header.h"
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/**
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* @addtogroup HwA_AONTIMER
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* @{
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*
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*/
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/********* Local typedef ************/
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/**
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* @brief The clock source of the pulse mode
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*
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*/
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typedef enum
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{
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AONTIMER_CLK0_PIN = 0, /*!< select the Aontimer_clk0 pin as pulse sourse*/
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AONTIMER_CLK1_PIN, /*!< select the Aontimer_clk1 pin as pulse sourse*/
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AONTIMER_CLK2_PIN, /*!< select the Aontimer_clk2 pin as pulse sourse*/
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AONTIMER_TRGSEL_OUTPUT, /*!< select the tresel as pulse sourse*/
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} AONTIMER_PulseClkSrcType;
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/**
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* @brief Aontimer clock source, please refer to Reference Manual chapter8.Aontimer for details.
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*
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* */
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typedef enum
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{
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AONTIMER_SIRC_1MHZ = 0U, /*!< AONTIMER SIRC 1mhz clock */
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AONTIMER_RTC_CLK = 2U, /*!< AONTIMER RTC clock */
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AONTIMER_IRC_CLK = 3U /*!< AONTIMER internal clock, which comes from PCC */
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} AONTIMER_ClkSrcType;
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/**
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* @brief The polarity of pulse mode
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*
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* */
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typedef enum
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{
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AONTIMER_PulsePolarityType_HIGH = 0, /*!< select the high polarity */
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AONTIMER_PulsePolarityType_LOW /*!< select the low polarity */
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} AONTIMER_PulsePolarityType;
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/********* Local inline function ************/
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/**
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* @brief Configure AONTIMER module
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*
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* @param u32RegValue CSR register value
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*/
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LOCAL_INLINE void AONTIMER_HWA_ConfigModule(uint32_t u32RegValue)
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{
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AONTIMER->CSR = u32RegValue;
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}
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/**
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* @brief Configure AONTIMER module prescale
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*
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* @param u32RegValue PSR register value
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*/
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LOCAL_INLINE void AONTIMER_HWA_ConfigModulePrescale(uint32_t u32RegValue)
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{
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AONTIMER->PSR = u32RegValue;
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}
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/**
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* @brief Set AONTIMER compare value
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*
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* @param u32RegValue CMR register value
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetModuleCompareValue(uint32_t u32RegValue)
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{
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AONTIMER->CMR = u32RegValue;
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}
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/**
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* @brief Set AONTIMER current counter value
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*
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* @param u32RegValue CNR register value
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetModuleCounterValue(uint32_t u32RegValue)
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{
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AONTIMER->CNR = u32RegValue;
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}
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/**
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* @brief Set AONTIMER module running on debug mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetModuleRunOnDebug(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_DBGEN_MASK;
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}
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/**
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* @brief Enable AONTIMER module interrupt
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_EnableModuleInterrupt(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_TIE_MASK;
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}
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/**
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* @brief Select AONTIMER module external clock source when timer configured to pulse mode
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*
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* @param eClk Input counter clock source
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*/
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LOCAL_INLINE void AONTIMER_HWA_SelectClkSrcOnPulseMode(AONTIMER_PulseClkSrcType eClk)
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{
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uint32_t u32RegValue = AONTIMER->CSR;
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AONTIMER->CSR |= (u32RegValue & ~(uint32_t)AONTIMER_CSR_TPS_MASK) | AONTIMER_CSR_TPS(eClk);
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}
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/**
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* @brief Clear AONTIMER interrupt flags
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_ClearInterruptFlag(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_TCF_MASK;
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}
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/**
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* @brief Set AONTIMER module polarity. Pulse counter input source is active-low, and the CNR increments on falling-edge.
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetModulePolarity(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_TPP_MASK;
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}
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/**
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* @brief Configure AONTIMER module polarity. If ePol is 0:Pulse counter input source is active-high, and the CNR increments on rising-edge.
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* If ePol is 1:Pulse counter input source is active-low, and the CNR increments on falling-edge.
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*
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* @param ePol Polarity enumeration
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*/
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LOCAL_INLINE void AONTIMER_HWA_ConfigModulePolarity(AONTIMER_PulsePolarityType ePol)
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{
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AONTIMER->CSR |= AONTIMER_CSR_TPP(ePol);
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}
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/**
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* @brief Enable AONTIMER module pulse mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_EnablePulseMode(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_TMS_MASK;
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}
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/**
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* @brief Enable AONTIMER timer
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_EnableTimer(void)
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{
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AONTIMER->CSR |= (uint32_t)AONTIMER_CSR_TEN_MASK;
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}
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/**
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* @brief Set AONTIMER prescale
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*
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* @param u8PrescalerValue Prescaler value,the range of the input value is :0~15, and the range of prescaler is :2^1 ~ 2^16.
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetPrescale(uint8_t u8PrescalerValue)
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{
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uint32_t u32RegValue = AONTIMER->PSR;
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AONTIMER->PSR = ((u32RegValue & ~(uint32_t)AONTIMER_PSR_PRESCALE_MASK) | AONTIMER_PSR_PRESCALE(u8PrescalerValue));
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}
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/**
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* @brief If enable bypass mode, the timer will bypass the prescaler in timer counter mode or glitch filter in pulse mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_EnableBypassMode(void)
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{
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AONTIMER->PSR |= (uint32_t)AONTIMER_PSR_PBYP_MASK;
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}
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/**
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* @brief Select AONTIMER mdoule clock source
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*
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* @param eClk Aontimer clock source
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*/
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LOCAL_INLINE void AONTIMER_HWA_SelectModuleClkSrc(AONTIMER_ClkSrcType eClk)
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{
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uint32_t u32RegValue = AONTIMER->PSR;
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AONTIMER->PSR = ((u32RegValue & ~(uint32_t)AONTIMER_PSR_PCS_MASK) | AONTIMER_PSR_PCS(eClk));
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}
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/**
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* @brief Set AONTIMER module stop on debug mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_SetModuleStopOnDebug(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_DBGEN_MASK;
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}
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/**
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* @brief Disable AONTIMER module interrupt
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_DisableModuleInterrupt(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_TIE_MASK;
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}
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/**
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* @brief Clear AONTIMER module mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_ClearModuleMode(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_TPS_MASK;
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}
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/**
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* @brief Clear AONTIMER module polarity. Pulse counter input source is active-high, and the CNR increments on rising-edge.
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_ClearModulePolarity(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_TPP_MASK;
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}
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/**
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* @brief Disable AONTIEMR module pulse mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_DisablePulseMode(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_TMS_MASK;
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}
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/**
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* @brief Disable AONTIMER module timer
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_DisableTimer(void)
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{
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AONTIMER->CSR &= ~(uint32_t)AONTIMER_CSR_TEN_MASK;
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}
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/**
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* @brief Clear AONTIMER module prescaler
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_ClearPrescale(void)
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{
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AONTIMER->PSR &= ~(uint32_t)AONTIMER_PSR_PRESCALE_MASK;
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}
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/**
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* @brief If disable bypass mode, the timer will enable the prescaler in timer counter mode or glitch filter in pulse mode
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_DisableBypassMode(void)
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{
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AONTIMER->PSR &= ~(uint32_t)AONTIMER_PSR_PBYP_MASK;
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}
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/**
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* @brief Clear AONTIMER module clock source
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*
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*/
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LOCAL_INLINE void AONTIMER_HWA_ClearModuleClkSrc(void)
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{
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AONTIMER->PSR &= ~(uint32_t)AONTIMER_PSR_PCS_MASK;
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}
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/** @}*/ /* HwA_AONTIMER */
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#endif /* HWA_INCLUDE_HWA_AONTIMER_H_ */
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