Обновление
This commit is contained in:
cfif
parent
4b8133e921
commit
8ae5ea888b
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@ -3,9 +3,9 @@
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*
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* Code generated for Simulink model 'Model_actuator'.
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*
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* Model version : 1.572
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* Model version : 1.581
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* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
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* C/C++ source code generated on : Fri Jan 30 16:05:13 2026
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* C/C++ source code generated on : Mon Feb 2 11:11:39 2026
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex-M
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@ -18,8 +18,12 @@
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#include "Model_actuator.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include "Model_actuator_types.h"
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#include "Model_actuator_private.h"
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/* Exported block states */
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IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
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/* Block states (default storage) */
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DW rtDW;
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@ -107,24 +111,11 @@ void Model_actuator_step(void)
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*/
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rtb_FailCond = (rtb_Divide1 < 15.0);
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/* Switch: '<S10>/Switch' incorporates:
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* DataStoreRead: '<S10>/Data Store Read4'
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* DataStoreWrite: '<S10>/Data Store Write'
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* Logic: '<S10>/Logical Operator3'
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* Logic: '<S10>/Logical Operator4'
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* UnitDelay: '<S10>/Unit Delay'
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*/
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if (rtb_FailCond && (!rtDW.UnitDelay_DSTATE)) {
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rtDW.UnitDelay1_DSTATE = rtDW.t_now;
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}
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/* End of Switch: '<S10>/Switch' */
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/* Sum: '<S10>/Subtract' incorporates:
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* DataStoreRead: '<S10>/Data Store Read4'
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* DataStoreWrite: '<S10>/Data Store Write'
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* UnitDelay: '<S10>/t_start_delay '
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*/
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rtb_dt = rtDW.t_now - rtDW.UnitDelay1_DSTATE;
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rtb_dt = rtDW.t_now - rtDW.t_start_delay_DSTATE;
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/* Logic: '<S2>/Logical Operator1' incorporates:
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* Constant: '<S5>/Constant'
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@ -149,17 +140,18 @@ void Model_actuator_step(void)
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/* End of Switch: '<S2>/Switch' */
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/* MATLAB Function: '<S10>/Normal Mode2' */
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/* : y = dt ; */
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/* : fprintf('int16 %d\n',int16(dt)); */
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if (rtb_dt > 32767U) {
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rtb_dt = 32767U;
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}
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printf("int16 %d\n", (int16_t)rtb_dt);
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fflush(stdout);
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/* End of MATLAB Function: '<S10>/Normal Mode2' */
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/* BusCreator: '<S11>/Bus Creator' incorporates:
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* DataStoreRead: '<S11>/Data Store Read'
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* DataStoreWrite: '<S11>/Data Store Write'
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* DataStoreWrite: '<S2>/Data Store Write1'
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* DataStoreWrite: '<S2>/Data Store Write2'
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*/
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IncarError.IncarFLErr = IncarFLErr;
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IncarError.IncarFRErr = false;
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IncarError.IncarRLErr = false;
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IncarError.IncarRRErr = false;
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IncarError.CANIncarTempErrF = IncarFLErr;
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IncarError.CANIncarTempErrR = false;
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/* MATLAB Function: '<S2>/Normal Mode' incorporates:
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* DataStoreRead: '<S2>/Data Store Read1'
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@ -191,8 +183,33 @@ void Model_actuator_step(void)
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printf("IncarFLOut %f\n", IncarFL);
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fflush(stdout);
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/* Update for UnitDelay: '<S10>/Unit Delay' */
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rtDW.UnitDelay_DSTATE = rtb_FailCond;
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/* MATLAB Function: '<S10>/Normal Mode2' */
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/* : y = dt ; */
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/* : fprintf('int16 %d\n',int16(dt)); */
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if (rtb_dt > 32767U) {
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rtb_dt = 32767U;
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}
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printf("int16 %d\n", (int16_t)rtb_dt);
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fflush(stdout);
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/* End of MATLAB Function: '<S10>/Normal Mode2' */
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/* Switch: '<S10>/Switch' incorporates:
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* DataStoreRead: '<S10>/Data Store Read4'
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* Logic: '<S10>/Logical Operator3'
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* Logic: '<S10>/Logical Operator4'
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* UnitDelay: '<S10>/Cond_prev'
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* UnitDelay: '<S10>/t_start_delay '
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*/
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if (rtb_FailCond && (!rtDW.Cond_prev_DSTATE)) {
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rtDW.t_start_delay_DSTATE = rtDW.t_now;
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}
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/* End of Switch: '<S10>/Switch' */
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/* Update for UnitDelay: '<S10>/Cond_prev' */
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rtDW.Cond_prev_DSTATE = rtb_FailCond;
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}
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/* Model initialize function */
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@ -3,9 +3,9 @@
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*
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* Code generated for Simulink model 'Model_actuator'.
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*
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* Model version : 1.571
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* Model version : 1.581
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* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
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* C/C++ source code generated on : Fri Jan 30 15:55:23 2026
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* C/C++ source code generated on : Mon Feb 2 11:11:39 2026
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex-M
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@ -41,9 +41,9 @@
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/* Block states (default storage) for system '<Root>' */
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typedef struct {
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IncarCmdBusInput controllerDataIncarInput;/* '<S2>/Data Store Memory' */
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uint32_t UnitDelay1_DSTATE; /* '<S10>/Unit Delay1' */
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uint32_t t_start_delay_DSTATE; /* '<S10>/t_start_delay ' */
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uint32_t t_now; /* '<S2>/Data Store Memory5' */
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bool UnitDelay_DSTATE; /* '<S10>/Unit Delay' */
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bool Cond_prev_DSTATE; /* '<S10>/Cond_prev' */
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} DW;
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/* Constant parameters (default storage) */
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@ -71,6 +71,16 @@ extern DW rtDW;
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/* Constant parameters (default storage) */
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extern const ConstP rtConstP;
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/*
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* Exported States
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*
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* Note: Exported states are block states with an exported global
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* storage class designation. Code generation will declare the memory for these
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* states and exports their symbols.
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*
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*/
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extern IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
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/* Model entry point functions */
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extern void Model_actuator_initialize(void);
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extern void Model_actuator_step(void);
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@ -79,12 +89,6 @@ extern void Model_actuator_terminate(void);
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/* Real-time Model object */
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extern RT_MODEL *const rtM;
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/*-
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* These blocks were eliminated from the model due to optimizations:
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*
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* Block '<S10>/Display' : Unused code path elimination
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*/
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/*-
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* The generated code includes comments that allow you to trace directly
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* back to the appropriate location in the model. The basic format
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@ -3,9 +3,9 @@
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*
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* Code generated for Simulink model 'Model_actuator'.
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*
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* Model version : 1.571
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* Model version : 1.581
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* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
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* C/C++ source code generated on : Fri Jan 30 15:55:23 2026
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* C/C++ source code generated on : Mon Feb 2 11:11:39 2026
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex-M
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@ -3,9 +3,9 @@
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*
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* Code generated for Simulink model 'Model_actuator'.
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*
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* Model version : 1.571
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* Model version : 1.581
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* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
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* C/C++ source code generated on : Fri Jan 30 15:55:23 2026
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* C/C++ source code generated on : Mon Feb 2 11:11:39 2026
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex-M
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@ -3,9 +3,9 @@
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*
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* Code generated for Simulink model 'Model_actuator'.
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*
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* Model version : 1.571
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* Model version : 1.581
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* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
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* C/C++ source code generated on : Fri Jan 30 15:55:23 2026
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* C/C++ source code generated on : Mon Feb 2 11:11:39 2026
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex-M
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