Обновление

This commit is contained in:
cfif 2026-02-02 15:19:22 +03:00
parent 4b8133e921
commit 8ae5ea888b
5 changed files with 180 additions and 159 deletions

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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.572 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 16:05:13 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@ -18,8 +18,12 @@
#include "Model_actuator.h" #include "Model_actuator.h"
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include "Model_actuator_types.h"
#include "Model_actuator_private.h" #include "Model_actuator_private.h"
/* Exported block states */
IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
/* Block states (default storage) */ /* Block states (default storage) */
DW rtDW; DW rtDW;
@ -27,184 +31,197 @@ DW rtDW;
static RT_MODEL rtM_; static RT_MODEL rtM_;
RT_MODEL *const rtM = &rtM_; RT_MODEL *const rtM = &rtM_;
double look1_binlx(double u0, const double bp0[], const double table[], uint32_t double look1_binlx(double u0, const double bp0[], const double table[], uint32_t
maxIndex) maxIndex)
{ {
double frac; double frac;
double yL_0d0; double yL_0d0;
uint32_t iLeft; uint32_t iLeft;
/* Column-major Lookup 1-D /* Column-major Lookup 1-D
Search method: 'binary' Search method: 'binary'
Use previous index: 'off' Use previous index: 'off'
Interpolation method: 'Linear point-slope' Interpolation method: 'Linear point-slope'
Extrapolation method: 'Linear' Extrapolation method: 'Linear'
Use last breakpoint for index at or above upper limit: 'off' Use last breakpoint for index at or above upper limit: 'off'
Remove protection against out-of-range input in generated code: 'off' Remove protection against out-of-range input in generated code: 'off'
*/ */
/* Prelookup - Index and Fraction /* Prelookup - Index and Fraction
Index Search method: 'binary' Index Search method: 'binary'
Extrapolation method: 'Linear' Extrapolation method: 'Linear'
Use previous index: 'off' Use previous index: 'off'
Use last breakpoint for index at or above upper limit: 'off' Use last breakpoint for index at or above upper limit: 'off'
Remove protection against out-of-range input in generated code: 'off' Remove protection against out-of-range input in generated code: 'off'
*/ */
if (u0 <= bp0[0U]) { if (u0 <= bp0[0U]) {
iLeft = 0U; iLeft = 0U;
frac = (u0 - bp0[0U]) / (bp0[1U] - bp0[0U]); frac = (u0 - bp0[0U]) / (bp0[1U] - bp0[0U]);
} else if (u0 < bp0[maxIndex]) { } else if (u0 < bp0[maxIndex]) {
uint32_t bpIdx; uint32_t bpIdx;
uint32_t iRght; uint32_t iRght;
/* Binary Search */ /* Binary Search */
bpIdx = maxIndex >> 1U; bpIdx = maxIndex >> 1U;
iLeft = 0U; iLeft = 0U;
iRght = maxIndex; iRght = maxIndex;
while (iRght - iLeft > 1U) { while (iRght - iLeft > 1U) {
if (u0 < bp0[bpIdx]) { if (u0 < bp0[bpIdx]) {
iRght = bpIdx; iRght = bpIdx;
} else { } else {
iLeft = bpIdx; iLeft = bpIdx;
} }
bpIdx = (iRght + iLeft) >> 1U; bpIdx = (iRght + iLeft) >> 1U;
}
frac = (u0 - bp0[iLeft]) / (bp0[iLeft + 1U] - bp0[iLeft]);
} else {
iLeft = maxIndex - 1U;
frac = (u0 - bp0[maxIndex - 1U]) / (bp0[maxIndex] - bp0[maxIndex - 1U]);
} }
/* Column-major Interpolation 1-D frac = (u0 - bp0[iLeft]) / (bp0[iLeft + 1U] - bp0[iLeft]);
Interpolation method: 'Linear point-slope' } else {
Use last breakpoint for index at or above upper limit: 'off' iLeft = maxIndex - 1U;
Overflow mode: 'wrapping' frac = (u0 - bp0[maxIndex - 1U]) / (bp0[maxIndex] - bp0[maxIndex - 1U]);
*/ }
yL_0d0 = table[iLeft];
return (table[iLeft + 1U] - yL_0d0) * frac + yL_0d0; /* Column-major Interpolation 1-D
Interpolation method: 'Linear point-slope'
Use last breakpoint for index at or above upper limit: 'off'
Overflow mode: 'wrapping'
*/
yL_0d0 = table[iLeft];
return (table[iLeft + 1U] - yL_0d0) * frac + yL_0d0;
} }
/* Model step function */ /* Model step function */
void Model_actuator_step(void) void Model_actuator_step(void)
{ {
double IncarFL; double IncarFL;
double rtb_Divide1; double rtb_Divide1;
uint32_t rtb_dt; uint32_t rtb_dt;
bool IncarFLErr; bool IncarFLErr;
bool rtb_FailCond; bool rtb_FailCond;
/* Product: '<S2>/Divide1' incorporates: /* Product: '<S2>/Divide1' incorporates:
* Constant: '<S2>/Constant' * Constant: '<S2>/Constant'
* Constant: '<S2>/Constant1' * Constant: '<S2>/Constant1'
* DataStoreRead: '<S2>/Data Store Read1' * DataStoreRead: '<S2>/Data Store Read1'
* Product: '<S2>/Divide' * Product: '<S2>/Divide'
*/ */
rtb_Divide1 = (double)rtDW.controllerDataIncarInput.InIncarFL / 4095.0 * 5.0; rtb_Divide1 = (double)rtDW.controllerDataIncarInput.InIncarFL / 4095.0 * 5.0;
/* Logic: '<S2>/Logical Operator' incorporates: /* Logic: '<S2>/Logical Operator' incorporates:
* Constant: '<S3>/Constant' * Constant: '<S3>/Constant'
* RelationalOperator: '<S3>/Compare' * RelationalOperator: '<S3>/Compare'
*/ */
rtb_FailCond = (rtb_Divide1 < 15.0); rtb_FailCond = (rtb_Divide1 < 15.0);
/* Switch: '<S10>/Switch' incorporates: /* Sum: '<S10>/Subtract' incorporates:
* DataStoreRead: '<S10>/Data Store Read4' * DataStoreRead: '<S10>/Data Store Read4'
* DataStoreWrite: '<S10>/Data Store Write' * UnitDelay: '<S10>/t_start_delay '
* Logic: '<S10>/Logical Operator3' */
* Logic: '<S10>/Logical Operator4' rtb_dt = rtDW.t_now - rtDW.t_start_delay_DSTATE;
* UnitDelay: '<S10>/Unit Delay'
*/
if (rtb_FailCond && (!rtDW.UnitDelay_DSTATE)) {
rtDW.UnitDelay1_DSTATE = rtDW.t_now;
}
/* End of Switch: '<S10>/Switch' */ /* Logic: '<S2>/Logical Operator1' incorporates:
* Constant: '<S5>/Constant'
* DataStoreWrite: '<S2>/Data Store Write1'
* RelationalOperator: '<S5>/Compare'
*/
IncarFLErr = (rtb_FailCond && (rtb_dt >= 3000U));
/* Sum: '<S10>/Subtract' incorporates: /* Switch: '<S2>/Switch' incorporates:
* DataStoreRead: '<S10>/Data Store Read4' * Constant: '<S2>/Constant2'
* DataStoreWrite: '<S10>/Data Store Write' * DataStoreWrite: '<S2>/Data Store Write'
*/ * DataStoreWrite: '<S2>/Data Store Write1'
rtb_dt = rtDW.t_now - rtDW.UnitDelay1_DSTATE; * Lookup_n-D: '<S2>/1-D Lookup Table'
* Product: '<S2>/Divide1'
*/
if (IncarFLErr) {
IncarFL = 200.0;
} else {
IncarFL = look1_binlx(rtb_Divide1, rtConstP.uDLookupTable_bp01Data,
rtConstP.uDLookupTable_tableData, 475U);
}
/* Logic: '<S2>/Logical Operator1' incorporates: /* End of Switch: '<S2>/Switch' */
* Constant: '<S5>/Constant'
* DataStoreWrite: '<S2>/Data Store Write1'
* RelationalOperator: '<S5>/Compare'
*/
IncarFLErr = (rtb_FailCond && (rtb_dt >= 3000U));
/* Switch: '<S2>/Switch' incorporates: /* BusCreator: '<S11>/Bus Creator' incorporates:
* Constant: '<S2>/Constant2' * DataStoreRead: '<S11>/Data Store Read'
* DataStoreWrite: '<S2>/Data Store Write' * DataStoreWrite: '<S11>/Data Store Write'
* DataStoreWrite: '<S2>/Data Store Write1' * DataStoreWrite: '<S2>/Data Store Write1'
* Lookup_n-D: '<S2>/1-D Lookup Table' * DataStoreWrite: '<S2>/Data Store Write2'
* Product: '<S2>/Divide1' */
*/ IncarError.IncarFLErr = IncarFLErr;
if (IncarFLErr) { IncarError.IncarFRErr = false;
IncarFL = 200.0; IncarError.IncarRLErr = false;
} else { IncarError.IncarRRErr = false;
IncarFL = look1_binlx(rtb_Divide1, rtConstP.uDLookupTable_bp01Data, IncarError.CANIncarTempErrF = IncarFLErr;
rtConstP.uDLookupTable_tableData, 475U); IncarError.CANIncarTempErrR = false;
}
/* End of Switch: '<S2>/Switch' */ /* MATLAB Function: '<S2>/Normal Mode' incorporates:
* DataStoreRead: '<S2>/Data Store Read1'
*/
/* : y = IncarFL; */
/* : fprintf('IncarFL %u \n',IncarFL); */
printf("IncarFL %u \n", rtDW.controllerDataIncarInput.InIncarFL);
fflush(stdout);
/* MATLAB Function: '<S10>/Normal Mode2' */ /* MATLAB Function: '<S2>/Normal Mode1' */
/* : y = dt ; */ /* : y = IncarFL_VIN ; */
/* : fprintf('int16 %d\n',int16(dt)); */ /* : fprintf('IncarFL_VIN %f\n',IncarFL_VIN); */
if (rtb_dt > 32767U) { printf("IncarFL_VIN %f\n", rtb_Divide1);
rtb_dt = 32767U; fflush(stdout);
}
printf("int16 %d\n", (int16_t)rtb_dt); /* MATLAB Function: '<S2>/Normal Mode2' incorporates:
fflush(stdout); * DataStoreWrite: '<S2>/Data Store Write1'
*/
/* : y = IncarFLErr ; */
/* : fprintf('IncarFLErr %d\n',int8(IncarFLErr)); */
printf("IncarFLErr %d\n", (int8_t)IncarFLErr);
fflush(stdout);
/* End of MATLAB Function: '<S10>/Normal Mode2' */ /* MATLAB Function: '<S2>/Normal Mode3' incorporates:
* DataStoreWrite: '<S2>/Data Store Write'
*/
/* : y = IncarFLOut ; */
/* : fprintf('IncarFLOut %f\n',IncarFLOut); */
printf("IncarFLOut %f\n", IncarFL);
fflush(stdout);
/* MATLAB Function: '<S2>/Normal Mode' incorporates: /* MATLAB Function: '<S10>/Normal Mode2' */
* DataStoreRead: '<S2>/Data Store Read1' /* : y = dt ; */
*/ /* : fprintf('int16 %d\n',int16(dt)); */
/* : y = IncarFL; */ if (rtb_dt > 32767U) {
/* : fprintf('IncarFL %u \n',IncarFL); */ rtb_dt = 32767U;
printf("IncarFL %u \n", rtDW.controllerDataIncarInput.InIncarFL); }
fflush(stdout);
/* MATLAB Function: '<S2>/Normal Mode1' */ printf("int16 %d\n", (int16_t)rtb_dt);
/* : y = IncarFL_VIN ; */ fflush(stdout);
/* : fprintf('IncarFL_VIN %f\n',IncarFL_VIN); */
printf("IncarFL_VIN %f\n", rtb_Divide1);
fflush(stdout);
/* MATLAB Function: '<S2>/Normal Mode2' incorporates: /* End of MATLAB Function: '<S10>/Normal Mode2' */
* DataStoreWrite: '<S2>/Data Store Write1'
*/
/* : y = IncarFLErr ; */
/* : fprintf('IncarFLErr %d\n',int8(IncarFLErr)); */
printf("IncarFLErr %d\n", (int8_t)IncarFLErr);
fflush(stdout);
/* MATLAB Function: '<S2>/Normal Mode3' incorporates: /* Switch: '<S10>/Switch' incorporates:
* DataStoreWrite: '<S2>/Data Store Write' * DataStoreRead: '<S10>/Data Store Read4'
*/ * Logic: '<S10>/Logical Operator3'
/* : y = IncarFLOut ; */ * Logic: '<S10>/Logical Operator4'
/* : fprintf('IncarFLOut %f\n',IncarFLOut); */ * UnitDelay: '<S10>/Cond_prev'
printf("IncarFLOut %f\n", IncarFL); * UnitDelay: '<S10>/t_start_delay '
fflush(stdout); */
if (rtb_FailCond && (!rtDW.Cond_prev_DSTATE)) {
rtDW.t_start_delay_DSTATE = rtDW.t_now;
}
/* Update for UnitDelay: '<S10>/Unit Delay' */ /* End of Switch: '<S10>/Switch' */
rtDW.UnitDelay_DSTATE = rtb_FailCond;
/* Update for UnitDelay: '<S10>/Cond_prev' */
rtDW.Cond_prev_DSTATE = rtb_FailCond;
} }
/* Model initialize function */ /* Model initialize function */
void Model_actuator_initialize(void) void Model_actuator_initialize(void)
{ {
/* (no initialization code required) */ /* (no initialization code required) */
} }
/* Model terminate function */ /* Model terminate function */
void Model_actuator_terminate(void) void Model_actuator_terminate(void)
{ {
/* (no terminate code required) */ /* (no terminate code required) */
} }
/* /*

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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@ -41,9 +41,9 @@
/* Block states (default storage) for system '<Root>' */ /* Block states (default storage) for system '<Root>' */
typedef struct { typedef struct {
IncarCmdBusInput controllerDataIncarInput;/* '<S2>/Data Store Memory' */ IncarCmdBusInput controllerDataIncarInput;/* '<S2>/Data Store Memory' */
uint32_t UnitDelay1_DSTATE; /* '<S10>/Unit Delay1' */ uint32_t t_start_delay_DSTATE; /* '<S10>/t_start_delay ' */
uint32_t t_now; /* '<S2>/Data Store Memory5' */ uint32_t t_now; /* '<S2>/Data Store Memory5' */
bool UnitDelay_DSTATE; /* '<S10>/Unit Delay' */ bool Cond_prev_DSTATE; /* '<S10>/Cond_prev' */
} DW; } DW;
/* Constant parameters (default storage) */ /* Constant parameters (default storage) */
@ -71,6 +71,16 @@ extern DW rtDW;
/* Constant parameters (default storage) */ /* Constant parameters (default storage) */
extern const ConstP rtConstP; extern const ConstP rtConstP;
/*
* Exported States
*
* Note: Exported states are block states with an exported global
* storage class designation. Code generation will declare the memory for these
* states and exports their symbols.
*
*/
extern IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
/* Model entry point functions */ /* Model entry point functions */
extern void Model_actuator_initialize(void); extern void Model_actuator_initialize(void);
extern void Model_actuator_step(void); extern void Model_actuator_step(void);
@ -79,12 +89,6 @@ extern void Model_actuator_terminate(void);
/* Real-time Model object */ /* Real-time Model object */
extern RT_MODEL *const rtM; extern RT_MODEL *const rtM;
/*-
* These blocks were eliminated from the model due to optimizations:
*
* Block '<S10>/Display' : Unused code path elimination
*/
/*- /*-
* The generated code includes comments that allow you to trace directly * The generated code includes comments that allow you to trace directly
* back to the appropriate location in the model. The basic format * back to the appropriate location in the model. The basic format

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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M

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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M

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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M