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Обновление

This commit is contained in:
cfif 2026-02-02 15:19:22 +03:00
parent 4b8133e921
commit 8ae5ea888b
5 changed files with 180 additions and 159 deletions
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77
Model_actuator.c
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.572 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 16:05:13 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@ -18,8 +18,12 @@
#include "Model_actuator.h" #include "Model_actuator.h"
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include "Model_actuator_types.h"
#include "Model_actuator_private.h" #include "Model_actuator_private.h"
/* Exported block states */
IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
/* Block states (default storage) */ /* Block states (default storage) */
DW rtDW; DW rtDW;
@ -107,24 +111,11 @@ void Model_actuator_step(void)
*/ */
rtb_FailCond = (rtb_Divide1 < 15.0); rtb_FailCond = (rtb_Divide1 < 15.0);
/* Switch: '<S10>/Switch' incorporates:
* DataStoreRead: '<S10>/Data Store Read4'
* DataStoreWrite: '<S10>/Data Store Write'
* Logic: '<S10>/Logical Operator3'
* Logic: '<S10>/Logical Operator4'
* UnitDelay: '<S10>/Unit Delay'
*/
if (rtb_FailCond && (!rtDW.UnitDelay_DSTATE)) {
rtDW.UnitDelay1_DSTATE = rtDW.t_now;
}
/* End of Switch: '<S10>/Switch' */
/* Sum: '<S10>/Subtract' incorporates: /* Sum: '<S10>/Subtract' incorporates:
* DataStoreRead: '<S10>/Data Store Read4' * DataStoreRead: '<S10>/Data Store Read4'
* DataStoreWrite: '<S10>/Data Store Write' * UnitDelay: '<S10>/t_start_delay '
*/ */
rtb_dt = rtDW.t_now - rtDW.UnitDelay1_DSTATE; rtb_dt = rtDW.t_now - rtDW.t_start_delay_DSTATE;
/* Logic: '<S2>/Logical Operator1' incorporates: /* Logic: '<S2>/Logical Operator1' incorporates:
* Constant: '<S5>/Constant' * Constant: '<S5>/Constant'
@ -149,17 +140,18 @@ void Model_actuator_step(void)
/* End of Switch: '<S2>/Switch' */ /* End of Switch: '<S2>/Switch' */
/* MATLAB Function: '<S10>/Normal Mode2' */ /* BusCreator: '<S11>/Bus Creator' incorporates:
/* : y = dt ; */ * DataStoreRead: '<S11>/Data Store Read'
/* : fprintf('int16 %d\n',int16(dt)); */ * DataStoreWrite: '<S11>/Data Store Write'
if (rtb_dt > 32767U) { * DataStoreWrite: '<S2>/Data Store Write1'
rtb_dt = 32767U; * DataStoreWrite: '<S2>/Data Store Write2'
} */
IncarError.IncarFLErr = IncarFLErr;
printf("int16 %d\n", (int16_t)rtb_dt); IncarError.IncarFRErr = false;
fflush(stdout); IncarError.IncarRLErr = false;
IncarError.IncarRRErr = false;
/* End of MATLAB Function: '<S10>/Normal Mode2' */ IncarError.CANIncarTempErrF = IncarFLErr;
IncarError.CANIncarTempErrR = false;
/* MATLAB Function: '<S2>/Normal Mode' incorporates: /* MATLAB Function: '<S2>/Normal Mode' incorporates:
* DataStoreRead: '<S2>/Data Store Read1' * DataStoreRead: '<S2>/Data Store Read1'
@ -191,8 +183,33 @@ void Model_actuator_step(void)
printf("IncarFLOut %f\n", IncarFL); printf("IncarFLOut %f\n", IncarFL);
fflush(stdout); fflush(stdout);
/* Update for UnitDelay: '<S10>/Unit Delay' */ /* MATLAB Function: '<S10>/Normal Mode2' */
rtDW.UnitDelay_DSTATE = rtb_FailCond; /* : y = dt ; */
/* : fprintf('int16 %d\n',int16(dt)); */
if (rtb_dt > 32767U) {
rtb_dt = 32767U;
}
printf("int16 %d\n", (int16_t)rtb_dt);
fflush(stdout);
/* End of MATLAB Function: '<S10>/Normal Mode2' */
/* Switch: '<S10>/Switch' incorporates:
* DataStoreRead: '<S10>/Data Store Read4'
* Logic: '<S10>/Logical Operator3'
* Logic: '<S10>/Logical Operator4'
* UnitDelay: '<S10>/Cond_prev'
* UnitDelay: '<S10>/t_start_delay '
*/
if (rtb_FailCond && (!rtDW.Cond_prev_DSTATE)) {
rtDW.t_start_delay_DSTATE = rtDW.t_now;
}
/* End of Switch: '<S10>/Switch' */
/* Update for UnitDelay: '<S10>/Cond_prev' */
rtDW.Cond_prev_DSTATE = rtb_FailCond;
} }
/* Model initialize function */ /* Model initialize function */

24
Model_actuator.h
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@ -41,9 +41,9 @@
/* Block states (default storage) for system '<Root>' */ /* Block states (default storage) for system '<Root>' */
typedef struct { typedef struct {
IncarCmdBusInput controllerDataIncarInput;/* '<S2>/Data Store Memory' */ IncarCmdBusInput controllerDataIncarInput;/* '<S2>/Data Store Memory' */
uint32_t UnitDelay1_DSTATE; /* '<S10>/Unit Delay1' */ uint32_t t_start_delay_DSTATE; /* '<S10>/t_start_delay ' */
uint32_t t_now; /* '<S2>/Data Store Memory5' */ uint32_t t_now; /* '<S2>/Data Store Memory5' */
bool UnitDelay_DSTATE; /* '<S10>/Unit Delay' */ bool Cond_prev_DSTATE; /* '<S10>/Cond_prev' */
} DW; } DW;
/* Constant parameters (default storage) */ /* Constant parameters (default storage) */
@ -71,6 +71,16 @@ extern DW rtDW;
/* Constant parameters (default storage) */ /* Constant parameters (default storage) */
extern const ConstP rtConstP; extern const ConstP rtConstP;
/*
* Exported States
*
* Note: Exported states are block states with an exported global
* storage class designation. Code generation will declare the memory for these
* states and exports their symbols.
*
*/
extern IncarCmdBusError IncarError; /* '<S2>/Data Store Memory3' */
/* Model entry point functions */ /* Model entry point functions */
extern void Model_actuator_initialize(void); extern void Model_actuator_initialize(void);
extern void Model_actuator_step(void); extern void Model_actuator_step(void);
@ -79,12 +89,6 @@ extern void Model_actuator_terminate(void);
/* Real-time Model object */ /* Real-time Model object */
extern RT_MODEL *const rtM; extern RT_MODEL *const rtM;
/*-
* These blocks were eliminated from the model due to optimizations:
*
* Block '<S10>/Display' : Unused code path elimination
*/
/*- /*-
* The generated code includes comments that allow you to trace directly * The generated code includes comments that allow you to trace directly
* back to the appropriate location in the model. The basic format * back to the appropriate location in the model. The basic format

4
Model_actuator_data.c
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M

4
Model_actuator_private.h
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M

4
Model_actuator_types.h
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'Model_actuator'. * Code generated for Simulink model 'Model_actuator'.
* *
* Model version : 1.571 * Model version : 1.581
* Simulink Coder version : 24.1 (R2024a) 19-Nov-2023 * Simulink Coder version : 24.1 (R2024a) 19-Nov-2023
* C/C++ source code generated on : Fri Jan 30 15:55:23 2026 * C/C++ source code generated on : Mon Feb 2 11:11:39 2026
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex-M * Embedded hardware selection: ARM Compatible->ARM Cortex-M