From 8776f5b5af78de3d15f61a8a34c586d8e84e7357 Mon Sep 17 00:00:00 2001 From: darya Date: Fri, 5 Jun 2026 09:38:47 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9E=D0=B1=D0=BD=D0=BE=D0=B2=D0=BB=D0=B5?= =?UTF-8?q?=D0=BD=D0=B8=D0=B5=20=D0=BA=D0=BE=D0=BC=D0=B0=D0=BD=D0=B4=D0=B8?= =?UTF-8?q?=D1=80=D0=BE=D0=B2=D0=BA=D0=B0=2005.06.2026?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- CanPorts.c | 381 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 379 insertions(+), 2 deletions(-) diff --git a/CanPorts.c b/CanPorts.c index 24da655..5eda34f 100644 --- a/CanPorts.c +++ b/CanPorts.c @@ -13,6 +13,7 @@ tCanPorts CAN_PORTS; + #if (CAN_DMA_EN == 1) typedef struct { @@ -280,7 +281,7 @@ static bool vCanPort_InitCan1() { &CAN_PORTS.Can1, FLEXCAN1, - 0, // CAN0 = 0 ... CAN3 = 3 + 1, // CAN0 = 0 ... CAN3 = 3 FlexCAN1_IRQn, // // FlexCAN0_IRQn ... FlexCAN3_IRQn 0xFF, @@ -375,4 +376,380 @@ void CAN2_IRQHandler(void) { void CAN3_IRQHandler(void) { FLEXCAN_IRQHandler(3U); -} \ No newline at end of file +} + + +/* +#if (CAN_DMA_EN == 1) + +typedef struct { + uint32_t u32CanRAM[4]; +} Can_RamType; + +#define size_aRxDataBuf 16 +ALIGN(256) Can_RamType g_aRxDataBufCan0[size_aRxDataBuf]; // dma ring buffer size is 256 +ALIGN(256) Can_RamType g_aRxDataBufCan1[size_aRxDataBuf]; // dma ring buffer size is 256 + +static void DMA_TransferCompleteCallbackCan0(void) { + CanSerialPortFrameIrqRxProcessing(CAN_PORTS.Can0_IO.env, (uint32_t *) &g_aRxDataBufCan0[0]); +} + +static void DMA_TransferCompleteCallbackCan1(void) { + CanSerialPortFrameIrqRxProcessing(CAN_PORTS.Can1_IO.env, (uint32_t *) &g_aRxDataBufCan1[0]); +} +#else + +static void CAN0_ErrorInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_ErrorInfoType *pErrorInfo) { + FLEXCAN_ClrErrorInfo(u8CanIndex, pErrorInfo); + PROCESS_UNUSED_VAR(u8CanIndex); + PROCESS_UNUSED_VAR(pErrorInfo); +} + +static void CAN0_RxInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_RxMsgType *pRxCfg) { + CanSerialPortFrameIrqRxProcessingNO_DMA(CAN_PORTS.Can0_IO.env, pRxCfg); +} + +static void CAN0_RxFifoInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_RxMsgType *pRxCfg) { + CanSerialPortFrameIrqRxProcessingNO_DMA(CAN_PORTS.Can0_IO.env, pRxCfg); +} + + +static void CAN1_ErrorInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_ErrorInfoType *pErrorInfo) { + FLEXCAN_ClrErrorInfo(u8CanIndex, pErrorInfo); + PROCESS_UNUSED_VAR(u8CanIndex); + PROCESS_UNUSED_VAR(pErrorInfo); +} + +static void CAN1_RxInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_RxMsgType *pRxCfg) { + CanSerialPortFrameIrqRxProcessingNO_DMA(CAN_PORTS.Can1_IO.env, pRxCfg); +} + +static void CAN1_RxFifoInterrupt_CallBack(uint8_t u8CanIndex, FLEXCAN_RxMsgType *pRxCfg) { + CanSerialPortFrameIrqRxProcessingNO_DMA(CAN_PORTS.Can1_IO.env, pRxCfg); +} + +#endif + + +//static void DMA_ErrorCallback(void) { +// while (1) { +// __asm("nop"); +// } +//} + +static void vCanPort_InitCAN0RxTxPin() { + PORT_InitType tInitStruct = {0U}; + GPIO_InitType tGpioInitStruct = {0}; + + // CAN0_STB + // PortC 30: MUX = GPIO output + tInitStruct.u32PortPins = PORT_PIN_30; + tInitStruct.uPortPinMux.u32PortPinMode = PORT_GPIO_MODE; + PORT_InitPins(PORT_C, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_30; + tGpioInitStruct.ePinDirection = GPIO_OUT; + tGpioInitStruct.ePinLevel = GPIO_LOW; + GPIO_InitPins(GPIO_C, &tGpioInitStruct); + + // Port C2: MUX = ALT3, CAN0_RX + tInitStruct.u32PortPins = PORT_PIN_2; + tInitStruct.uPortPinMux.u32PortPinMode = PORTC_2_FLEXCAN0_RX; + tInitStruct.bPullEn = FALSE; + tInitStruct.ePullSel = PORT_PULL_UP; + PORT_InitPins(PORT_C, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_2; + tGpioInitStruct.ePinDirection = GPIO_IN; + GPIO_InitPins((GPIO_InstanceType) PORT_C, &tGpioInitStruct); + + // Port C3: MUX = ALT3, CAN0_TX + tInitStruct.u32PortPins = PORT_PIN_3; + tInitStruct.uPortPinMux.u32PortPinMode = PORTC_3_FLEXCAN0_TX; + PORT_InitPins(PORT_C, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_3; + tGpioInitStruct.ePinDirection = GPIO_OUT; + tGpioInitStruct.ePinLevel = GPIO_HIGH; + GPIO_InitPins(GPIO_C, &tGpioInitStruct); +} + +#define countIdCanHardSoftFilterCan0 31 +const FilterTo_FLEXCAN_RxMbFilterType IdCanHardSoftFilterCan0[countIdCanHardSoftFilterCan0] = { + {FLEXCAN_ID_STD, Diag_To_CCU_CANID, 0x7FF, PROTOCOL_CAN_UDS}, + {FLEXCAN_ID_STD, Diag_Functional_CANID, 0x7FF, PROTOCOL_CAN_UDS}, + {FLEXCAN_ID_STD, EMS_Veh_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, BCM_Powertrain_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, EMS_Veh_02_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, BCM_EEM_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, DMFR_Msg1_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, DMFL_Msg1_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, TM_Stat_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, TM_CP_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, HVC_CCU_Status_Msg_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, BCM_VEH_STATE_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, EMS_HVC_Req_Msg_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, HVC_Err_Status_Msg_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, BCM_CLIMATIC_DATA_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, VCU_CCU_Req_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, ESC_08_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, SMFL_status_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, SMFR_status_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, SMRL_status_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, SMRR_status_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, SDM_Cmd_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, VEH_VIN_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, OCUFL_MSG_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, OCUFR_MSG_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, OCURL_MSG_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, OCURR_MSG_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, DW_STATE_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, FIU_CCU1_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, FIU_CCU2_CANID, 0x7FF, PROTOCOL_CAN_RAW}, + {FLEXCAN_ID_STD, FIU_CCU3_CANID, 0x7FF, PROTOCOL_CAN_RAW} +}; + +#if (CAN_DMA_EN == 1) +#define countIdCanFilterFifoCan0 7 +const FLEXCAN_RxMbFilterType IdCanFilterFifoCan0[countIdCanFilterFifoCan0] = { + {FLEXCAN_ID_STD, 0x100, 0x7FF}, + {FLEXCAN_ID_STD, 0x200, 0x7FF}, + {FLEXCAN_ID_STD, 0x300, 0x7FF}, + {FLEXCAN_ID_STD, 0x400, 0x7FF}, + {FLEXCAN_ID_STD, 0x500, 0x7FF}, + {FLEXCAN_ID_STD, Diag_To_CCU_CANID, 0x7FF}, + {FLEXCAN_ID_STD, Diag_Functional_CANID, 0x7FF} +}; +#endif + + +#define countIdCanHardSoftFilterCan1 2 +const FilterTo_FLEXCAN_RxMbFilterType IdCanHardSoftFilterCan1[countIdCanHardSoftFilterCan1] = { + {FLEXCAN_ID_STD, Diag_To_CCU_CANID, 0x7FF, PROTOCOL_CAN_UDS}, + {FLEXCAN_ID_STD, Diag_Functional_CANID, 0x7FF, PROTOCOL_CAN_UDS}, +// {FLEXCAN_ID_STD, XCP_CCU_RX_CANID, 0x7FF, PROTOCOL_CAN_XCP}, +// {FLEXCAN_ID_STD, dbg_Cmd_Act_Information_CANID, 0x7FF, PROTOCOL_CAN_RAW} +}; + + +#if (CAN_DMA_EN == 1) +#define countIdCanFilterFifoCan1 7 +const FLEXCAN_RxMbFilterType IdCanFilterFifoCan1[countIdCanFilterFifoCan1] = { +// {FLEXCAN_ID_STD, 0, 0} + {FLEXCAN_ID_STD, 0x100, 0x7FF}, + {FLEXCAN_ID_STD, 0x200, 0x7FF}, + {FLEXCAN_ID_STD, 0x300, 0x7FF}, + {FLEXCAN_ID_STD, 0x400, 0x7FF}, + {FLEXCAN_ID_STD, 0x500, 0x7FF}, + {FLEXCAN_ID_STD, Diag_To_CCU_CANID, 0x7FF}, + {FLEXCAN_ID_STD, Diag_Functional_CANID, 0x7FF} +}; +#endif + +static bool vCanPort_InitCan0() { + vCanPort_InitCAN0RxTxPin(); + +#if (CAN_DMA_EN == 1) + bool result = vCanSerialPortFrameDMAInit( + &CAN_PORTS.Can0, + + FLEXCAN0, + 0, // CAN0 = 0 ... CAN3 = 3 + FlexCAN0_IRQn, // // FlexCAN0_IRQn ... FlexCAN3_IRQn + + 0xFF, + DMA_CHANNEL_0, + + DMA_REQ_FLEXCAN0, + + (uint8_t *) &g_aRxDataBufCan0[0], + size_aRxDataBuf, + + IdCanHardSoftFilterCan0, + countIdCanHardSoftFilterCan0, + + IdCanFilterFifoCan0, + countIdCanFilterFifoCan0, + + DMA0_IRQn, + 0xFF, + DMA0_IRQn, + + FLEXCAN_BAUD_500K, + FLEXCAN_ID_STD, + 0x55, + NULL, + NULL, + NULL, + NULL, + + DMA_TransferCompleteCallbackCan0, + NULL + ); +#else + + bool result = vCanSerialPortFrameMbInit( + &CAN_PORTS.Can0, + + FLEXCAN0, + 0, // CAN0 = 0 ... CAN3 = 3 + FlexCAN0_IRQn, // // FlexCAN0_IRQn ... FlexCAN3_IRQn + + 0xFF, + IdCanHardSoftFilterCan0, + countIdCanHardSoftFilterCan0, + + + FLEXCAN_BAUD_500K, + FLEXCAN_ID_STD, + 0x55, + CAN0_ErrorInterrupt_CallBack, + CAN0_RxInterrupt_CallBack, + CAN0_RxFifoInterrupt_CallBack, + NULL + ); + +#endif + + + return result; +} + + +static void vCanPort_InitCAN1RxTxPin() { + PORT_InitType tInitStruct = {0U}; + GPIO_InitType tGpioInitStruct = {0}; + + // CAN1_STB + // PortD 28: MUX = GPIO output + tInitStruct.u32PortPins = PORT_PIN_28; + tInitStruct.uPortPinMux.u32PortPinMode = PORT_GPIO_MODE; + PORT_InitPins(PORT_D, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_28; + tGpioInitStruct.ePinDirection = GPIO_OUT; + tGpioInitStruct.ePinLevel = GPIO_LOW; + GPIO_InitPins(GPIO_D, &tGpioInitStruct); + + // PortA 12: MUX = ALT3, CAN1_RX + tInitStruct.u32PortPins = PORT_PIN_12; + tInitStruct.uPortPinMux.u32PortPinMode = PORTA_12_FLEXCAN1_RX; + tInitStruct.bPullEn = FALSE; + tInitStruct.ePullSel = PORT_PULL_UP; + PORT_InitPins(PORT_A, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_12; + tGpioInitStruct.ePinDirection = GPIO_IN; + GPIO_InitPins((GPIO_InstanceType) PORT_A, &tGpioInitStruct); + + // PortA 13: MUX = ALT4, CAN1_TX + tInitStruct.u32PortPins = PORT_PIN_13; + tInitStruct.uPortPinMux.u32PortPinMode = PORTA_13_FLEXCAN1_TX; + PORT_InitPins(PORT_A, &tInitStruct); + tGpioInitStruct.u32GpioPins = PORT_PIN_13; + tGpioInitStruct.ePinDirection = GPIO_OUT; + tGpioInitStruct.ePinLevel = GPIO_HIGH; + GPIO_InitPins(GPIO_A, &tGpioInitStruct); +} + +static bool vCanPort_InitCan1() { + + vCanPort_InitCAN1RxTxPin(); + +#if (CAN_DMA_EN == 1) + bool result = vCanSerialPortFrameDMAInit( + &CAN_PORTS.Can1, + + FLEXCAN1, + 1, // CAN0 = 0 ... CAN3 = 3 + FlexCAN1_IRQn, // // FlexCAN0_IRQn ... FlexCAN3_IRQn + + 0xFF, + DMA_CHANNEL_1, + + DMA_REQ_FLEXCAN1, + + (uint8_t *) &g_aRxDataBufCan1[0], + size_aRxDataBuf, + + IdCanHardSoftFilterCan1, + countIdCanHardSoftFilterCan1, + + IdCanFilterFifoCan1, + countIdCanFilterFifoCan1, + + DMA1_IRQn, + 0xFF, + DMA1_IRQn, + + FLEXCAN_BAUD_500K, + FLEXCAN_ID_STD, + 0x55, + NULL, + NULL, + NULL, + NULL, + + DMA_TransferCompleteCallbackCan1, + NULL + ); +#else + bool result = vCanSerialPortFrameMbInit( + &CAN_PORTS.Can1, + + FLEXCAN1, + 1, // CAN0 = 0 ... CAN3 = 3 + FlexCAN1_IRQn, // // FlexCAN0_IRQn ... FlexCAN3_IRQn + + 0xFF, + IdCanHardSoftFilterCan1, + countIdCanHardSoftFilterCan1, + + + FLEXCAN_BAUD_500K, + FLEXCAN_ID_STD, + 0x55, + CAN1_ErrorInterrupt_CallBack, + CAN1_RxInterrupt_CallBack, + CAN1_RxFifoInterrupt_CallBack, + NULL + ); + +#endif + return result; +} + + +void CanPorts_Init(tLoggerInterface *logger) { + CAN_PORTS.Can0.reInit = false; + bool result = vCanPort_InitCan0(); + if (result) { + LoggerInfoStatic(LOGGER, LOG_SIGN, "Initialization CAN0 - OK") + } else { + LoggerInfoStatic(LOGGER, LOG_SIGN, "Initialization CAN0 - ERROR") + } + CAN_PORTS.Can0_IO = CanPortFrame_GetIo(&CAN_PORTS.Can0); + + CAN_PORTS.Can1.reInit = false; + + result = vCanPort_InitCan1(); + if (result) { + LoggerInfoStatic(LOGGER, LOG_SIGN, "Initialization CAN1 - OK") + } else { + LoggerInfoStatic(LOGGER, LOG_SIGN, "Initialization CAN1 - ERROR") + } + CAN_PORTS.Can1_IO = CanPortFrame_GetIo(&CAN_PORTS.Can1); + +} + +void CAN0_IRQHandler(void) { + FLEXCAN_IRQHandler(0U); +} + +void CAN1_IRQHandler(void) { + FLEXCAN_IRQHandler(1U); +} + +void CAN2_IRQHandler(void) { + FLEXCAN_IRQHandler(2U); +} + +void CAN3_IRQHandler(void) { + FLEXCAN_IRQHandler(3U); +} +*/ \ No newline at end of file