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Добавлены интерфейсы и драйверы

This commit is contained in:
cfif 2025-09-30 15:52:33 +03:00
parent 392f342052
commit 4dec2ef0a8
5 changed files with 165 additions and 62 deletions
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119
APP/Clock.c
View File

@ -13,6 +13,7 @@
/* ################################################################################## */
/* ########################### Local Prototype Functions ############################ */
static void Bsp_SCG_Init(void);
static void Bsp_PCC_Init(void);
/* ################################################################################## */
@ -23,91 +24,90 @@ static void Bsp_PCC_Init(void);
* @brief Local SCG initial
*
*/
static void Bsp_SCG_Init(void)
{
static void Bsp_SCG_Init(void) {
/* Enable FOSC, frequency is 24M, DIVH=DIV1(24M), DIVM=DIV1(24M), DIVL=DIV2(12M)*/
SCG_FoscType tFoscStruct =
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.bBypass = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY1,
.eDivM = SCG_ASYNCCLOCKDIV_BY1,
.eDivL = SCG_ASYNCCLOCKDIV_BY2,
};
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.bBypass = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY1,
.eDivM = SCG_ASYNCCLOCKDIV_BY1,
.eDivL = SCG_ASYNCCLOCKDIV_BY2,
};
SCG_EnableFOSC(&tFoscStruct);
/* Enable PLL0, frequency is 240M, DIVH=DIV2(120M), DIVM=DIV2(120M), DIVL=DIV4(60M), src=FOSC*/
/* The value of multiplier factor(FOSC/u8Prediv) between 2 ~ 4 is better*/
SCG_PllType tPll0Struct =
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY2,
.eDivM = SCG_ASYNCCLOCKDIV_BY2,
.eDivL = SCG_ASYNCCLOCKDIV_BY4,
.u8Prediv = 11U,
.ePstDiv = SCG_PLLPSTDIV_BY2,
.u16Mult = 239U,
.eSrc = SCG_PLLSOURCE_FOSC
};
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY2,
.eDivM = SCG_ASYNCCLOCKDIV_BY2,
.eDivL = SCG_ASYNCCLOCKDIV_BY4,
.u8Prediv = 11U,
.ePstDiv = SCG_PLLPSTDIV_BY2,
.u16Mult = 239U,
.eSrc = SCG_PLLSOURCE_FOSC
};
SCG_EnablePLL(SCG_PLL0, &tPll0Struct);
/* Enable PLL1, frequency is 240M, DIVH=DIV2(120M), DIVM=DIV2(120M), DIVL=DIV4(60M), src=FOSC*/
/* The value of multiplier factor(FOSC/u8Prediv) between 2 ~ 4 is better*/
SCG_PllType tPll1Struct =
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY2,
.eDivM = SCG_ASYNCCLOCKDIV_BY2,
.eDivL = SCG_ASYNCCLOCKDIV_BY4,
.u8Prediv = 11U,
.ePstDiv = SCG_PLLPSTDIV_BY2,
.u16Mult = 239U,
.eSrc = SCG_PLLSOURCE_FOSC
};
{
.bLock = false,
.bCm = false,
.bCmre = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY2,
.eDivM = SCG_ASYNCCLOCKDIV_BY2,
.eDivL = SCG_ASYNCCLOCKDIV_BY4,
.u8Prediv = 11U,
.ePstDiv = SCG_PLLPSTDIV_BY2,
.u16Mult = 239U,
.eSrc = SCG_PLLSOURCE_FOSC
};
SCG_EnablePLL(SCG_PLL1, &tPll1Struct);
/* Enable SIRC DIV, DIVH=DIV1(12M), DIVM=DIV1(12M), DIVL=DIV2(6M) */
SCG_SircType tSircStruct =
{
.bLock = false,
.bCm = false,
.bTrEn = false,
.bLpen = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY1,
.eDivM = SCG_ASYNCCLOCKDIV_BY1,
.eDivL = SCG_ASYNCCLOCKDIV_BY2,
.u8TrimSrc = 0U
};
{
.bLock = false,
.bCm = false,
.bTrEn = false,
.bLpen = false,
.bSten = false,
.eDivH = SCG_ASYNCCLOCKDIV_BY1,
.eDivM = SCG_ASYNCCLOCKDIV_BY1,
.eDivL = SCG_ASYNCCLOCKDIV_BY2,
.u8TrimSrc = 0U
};
SCG_SetSIRC(&tSircStruct);
/* Set core clock source from PLL0, DIV_CORE=DIV1(240M), DIV_BUS=DIV2(120M), DIV_SLOW=DIV4(60M)*/
SCG_ClockCtrlType tClockStruct =
{
.bSysClkMonitor = false,
.eSrc = SCG_CLOCK_SRC_PLL0,
.eDivSlow = SCG_CLOCK_DIV_BY2,
.eDivBus = SCG_CLOCK_DIV_BY2,
.eDivCore = SCG_CLOCK_DIV_BY1
};
{
.bSysClkMonitor = false,
.eSrc = SCG_CLOCK_SRC_PLL0,
.eDivSlow = SCG_CLOCK_DIV_BY2,
.eDivBus = SCG_CLOCK_DIV_BY2,
.eDivCore = SCG_CLOCK_DIV_BY1
};
SCG_SetClkCtrl(&tClockStruct);
}
/**
* @brief Local PCC Initial
*
*/
static void Bsp_PCC_Init(void)
{
static void Bsp_PCC_Init(void) {
PCC_CtrlType bSP_PCC_Config;
/* DMA 0 */
@ -139,8 +139,7 @@ static void Bsp_PCC_Init(void)
* @brief General Clock Initial
*
*/
void Bsp_CLOCK_Init(void)
{
void Bsp_CLOCK_Init(void) {
SCG_Deinit();
Bsp_SCG_Init();
Bsp_PCC_Init();

17
APP/FC7240_flash.ld
View File

@ -115,7 +115,6 @@ SECTIONS
. = ALIGN(4);
} > SRAM1
__HeapBegin = ORIGIN(DTCM_STACK);
__HeapLimit = ORIGIN(DTCM_STACK) + 0x200 - 8;
@ -125,5 +124,21 @@ SECTIONS
__rom_data_start = LOADADDR(.data);
__rom_ncache_data_start = LOADADDR(.ncache_data);
/* User_heap_stack section, used to check that there is enough RAM left */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} > DTCM_STACK
}

2
APP/FreeRTOSConfig.h
View File

@ -76,7 +76,7 @@ extern uint32_t SystemCoreClock;
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)64)
#define configTOTAL_HEAP_SIZE ((size_t)52000)
#define configTOTAL_HEAP_SIZE ((size_t)32000)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0

13
APP/main.c
View File

@ -3,6 +3,12 @@
//
#include "Clock.h"
#include "cmsis_os.h"
#include "MainModesArbiter.h"
#include "PeripheralInterfaces.h"
#include <stdlib.h>
tMma MAIN_ENV;
_Noreturn void stop() {
while (1) {
@ -26,7 +32,14 @@ int main(void)
osKernelInitialize();
Mma_Init(&MAIN_ENV, &GPIOS, &SERIAL_PORTS, &RTCS);
Mma_StartThread(&MAIN_ENV);
osKernelStart();
volatile int *p = (int *) malloc(10000 * sizeof(int));
STOP
}

76
modular.json
View File

@ -80,6 +80,82 @@
"repo": "SerialPort_P2P_CmsisRtos"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_DebugTesting"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_Indication"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "BaseTypes"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "LoggerToSerialPort"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_PowerManagement"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_ComInt"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_Command"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "HVAC_M7_Rtcs"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "Rtc_Flagchip_FC7240"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "VariablesTable"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "ComIntCmd_Vars"
},
{
"type": "git",
"provider": "HVAC_M7",
"repo": "FirmwareMetadataSection"
},
{
"type": "local",