Обновление после командировки 29.06.2026

This commit is contained in:
cfif 2026-06-29 13:13:46 +03:00
parent f4ceef7a12
commit 41f042b378
4 changed files with 8 additions and 59 deletions

View File

@ -238,13 +238,14 @@ static void Bsp_PCC_Init(void) {
PCC_SetPcc(&bSP_PCC_Config);
// CRC
bSP_PCC_Config.eClockName = PCC_CLK_CRC0;
bSP_PCC_Config.bEn = true;
bSP_PCC_Config.eClkSrc = PCC_CLKGATE_SRC_PLL0DIV;
bSP_PCC_Config.eDivider = PCC_CLK_UNINVOLVED;
PCC_SetPcc(&bSP_PCC_Config);
// PCC_CLK_WKU0
bSP_PCC_Config.eClockName = PCC_CLK_WKU0;
bSP_PCC_Config.bEn = true;

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@ -76,7 +76,7 @@ extern uint32_t SystemCoreClock;
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)64)
#define configTOTAL_HEAP_SIZE ((size_t)24 * 1024)
#define configTOTAL_HEAP_SIZE ((size_t)20 * 1024)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0

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@ -44,7 +44,7 @@ int printf(const char *format, ...) {
// buffer_printf[ret - 1] = ' ';
// }
LoggerCnInfo(LOGGER, LOG_SIGN, buffer_printf, ret)
// LoggerCnInfo(LOGGER, LOG_SIGN, buffer_printf, ret)
}
return ret;

View File

@ -24,71 +24,20 @@
static void data_clear(uint32_t u32StartAddr, uint32_t u32EndAddr);
static void data_copy(uint32_t u32SourceAddr, uint32_t u32DestAddr, uint32_t u32DestEndAddr);
#define REG_VAL(addr) (*(volatile uint32 *)(addr))
#define REG_VAL_OFF(addr,offset) (*(volatile uint32 *)((addr)+(offset)))
#define WDOG0_BASE_ADDR 0x40022000U
#define WDOG1_BASE_ADDR 0x40433000U
#define SMC_STANDBY_CFG_ADDR 0x40045010U
#define SCM_BASE_ADDR 0x40072000U
#define RGM_BASE_ADDR 0x40046000U
#define PCC_STCU_ADDR 0x400241FCU
#define STCU_BASE_ADDR 0x4007F000U
#define DWT_CYCCNT_ADDR 0xE0001004U
#define DEMCR_ADDR 0xE000EDFCU
#define CPACR_ADDR 0xE000ED88U
static void wdog_disable(uint32 wdog_base)
{
uint32 u32ttt = 128;
uint32 u32First = 1;
/* if it is not first time configure wdog, unlock status only pending for 128 bus clock */
do {
/* check unlock active */
if (0U == (0x800u & REG_VAL(wdog_base)))
{
/* if unlock statue turn to 0, means not first time configuring wdog */
u32First = 0;
break;
}
} while (u32ttt--);
if (u32First == 0U)
{
/* only unlock=0, reconfig=1, can unlock wdog*/
/* waiting reconfiguration successful */
while (0U == (0x400u & REG_VAL(wdog_base)));
/* unlock wdog */
REG_VAL_OFF(wdog_base, 4) = 0x08181982;
/* waiting unlock active */
while (0U == (0x800u & REG_VAL(wdog_base)));
}
REG_VAL(wdog_base) = 0x2920;
REG_VAL_OFF(wdog_base, 8) = 0xF000;
/* waiting reconfiguration successful */
while (0U == (0x400u & REG_VAL(wdog_base)));
}
/**
* \brief System Initialization
*
*/
void System_Init(void)
{
// disable wdog 0
/* disable wdog 0 */
*(volatile uint32 *)0x40022004 = 0x08181982;
while (0U == (0x800u & *(volatile uint32 *)0x40022000));
*(volatile uint32 *)0x40022000 = 0x2920;
*(volatile uint32 *)0x40022008 = 0xF000;
while (0U == (0x400u & *(volatile uint32 *)0x40022000));
// disable wdog 1
/* disable wdog 1 */
*(volatile uint32 *)0x40433004 = 0x08181982;
while (0U == (0x800u & *(volatile uint32 *)0x40433000));
*(volatile uint32 *)0x40433000 = 0x2920;
@ -96,9 +45,8 @@ void System_Init(void)
while (0U == (0x400u & *(volatile uint32 *)0x40433000));
#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
FPU_Enable(); // Enable FPU
#endif
FPU_Enable(); /* Enable FPU */
#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
}