#ifndef _DEVICE_FEATURES_FC7240_SCG_COMMON_H_
#define _DEVICE_FEATURES_FC7240_SCG_COMMON_H_

/******************* Oscillator Values *******************/
/**
  * @brief Fast OSC frequency
  */
#ifndef FOSC_FREQUENCY
#define FOSC_FREQUENCY   24000000U
#endif

/**
  * @brief Slow OSC frequency
  */
#ifndef SOSC_FREQUENCY
#define SOSC_FREQUENCY   32768U
#endif

/**
  * @brief FTU input TCLK frequency
  */
#ifndef PCC_FTU_TCLK_FREQ
#define PCC_FTU_TCLK_FREQ   0U
#endif


/************ SCG Features **************/
/** Number of instances of the SCG module. */
#define SCG_INSTANCE_COUNT                       (1u)


/** Array initializer of SCG peripheral base addresses */
#define SCG_BASE_ADDRS                           {SCG_BASE}
/** Array initializer of SCG peripheral base pointers */
#define SCG_BASE_PTRS                            {SCG}




/************ SCG Registers Features **************/
#define SCG_PLL_LOSS_LOCK_CTRL_SUPPORT   (1u)
#define SCG_SYSCLK_SEL_SIRC_SUPPORT      (1u)
#define SCG_PLLX_CLK1_SUPPORT            (0u)
#define SCG_LP_WKPWDG_SUPPORT            (1u)
#define SCG_SIRC_LP_WAKEUP_SUPPORT       (0u)
#define SCG_AUTOTRIM_SUPPORT             (0u)
#define SCG_PLL1_SUPPORT                 (1u)
#define SCG_PLL0_CLK2_SUPPORT            (0u)
#define SCG_ERRATA_DIVCORE_DIVBUS        (1u)
#define SCG_PLL_INIT_DIS_FOSC_SUPPORT    (1u)
#define SCG_PLL_ERRATA_PSTDIV1_SUPPORT   (0u)


/************ SCG Clock Limits **************/
#define SIRC_CLOCK                       12000000U
#define SIRC32K_CLOCK                    32000U
#define FIRC_CLOCK                       96000000U
#define NVM_CLOCK                        12000000U
#define IRC_TRIM_DIV_CLOCK               1000000U

#define FOSC_STABILIZATION_TIMEOUT       4800000U
#define FIRC_STABILIZATION_TIMEOUT       100000U
#define SIRC_STABILIZATION_TIMEOUT       100000U
#define SIRC32K_STABILIZATION_TIMEOUT    100000U
#define SOSC_STABILIZATION_TIMEOUT       150000000U
#define PLL_STABILIZATION_TIMEOUT        641000U
#define SCG_CLKSRC_STABILIZATION_TIMEOUT 100000U
#define CLOCK_OFF_STABILIZATION_TIMEOUT  100000U
#define CLOCK_DIV_STABILIZATION_TIMEOUT  100000U
#define IRC_TRIM_STABILIZATION_TIMEOUT   1000000U

#define PLL_VCO_CLK_MAX                  640000000U
#define PLL_VCO_CLK_MIN                  240000000U
#define PLL_FEEDBACK_CLK_MAX             4000000U
#define PLL_FEEDBACK_CLK_MIN             2000000U
#define PLL_CLK_MIN                      120000000U
#define PLL_CLK_MAX                      320000000U
#define SYS_CORE_CLK_MAX                 240000000U
#define SYS_BUS_CLK_MAX                  120000000U
#define SYS_SLOW_CLK_MAX                 60000000U

#define FOSC_DIVH_MAX_CLOCK 48000000U
#define FOSC_DIVM_MAX_CLOCK 48000000U
#define FOSC_DIVL_MAX_CLOCK 48000000U
#define FIRC_DIVH_MAX_CLOCK 96000000U
#define FIRC_DIVM_MAX_CLOCK 96000000U
#define FIRC_DIVL_MAX_CLOCK 48000000U

#define PLL0_DIVH_MAX_CLOCK 120000000U
#define PLL0_DIVM_MAX_CLOCK 120000000U
#define PLL0_DIVL_MAX_CLOCK 60000000U
#define PLL1_DIVH_MAX_CLOCK 160000000U
#define PLL1_DIVM_MAX_CLOCK 160000000U
#define PLL1_DIVL_MAX_CLOCK 80000000U


#endif /* _DEVICE_FEATURES_FC7240_SCG_COMMON_H_ */
