HVAC_M7
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CanSerialPortFrame_Flagchip_FC7240
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This commit is contained in:
cfif 2025-12-10 15:47:26 +03:00
parent 9fcb827059
commit 276f0e2f8a
2 changed files with 141 additions and 315 deletions
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60
Inc/CanSerialPortFrame.h
View File

@ -41,6 +41,13 @@ typedef struct {
#define COUNT_QUEUE 4
typedef struct
{
FLEXCAN_IdType eRxFrameType; /**< FLEXCAN ID type, 0 STD, 1 EXT */
uint32_t u32RxCanId; /**< FLEXCAN received ID */
uint32_t u32RxCanIdMask; /**< FLEXCAN received ID mask, if mask bit is 1, received FLEXCAN id bit must same to u32RxCanId, or mask bit is 0, id bit is ignored */
uint8_t filter;
} FilterTo_FLEXCAN_RxMbFilterType;
typedef struct {
@ -55,6 +62,8 @@ typedef struct {
bool reInit;
uint8_t CountFilter_RX;
FLEXCAN_BaudType canBaudRate;
uint32_t g_u32RxDataIndex;
@ -67,52 +76,37 @@ typedef struct {
osMessageQueueId_t txAccessQueue;
DMA_InitType dmaInitCfg_RX;
DMA_ChannelCfgType chnCfg_RX;
DMA_InterruptCfgType interruptCfg_RX;
FLEXCAN_InitType tInitCfg;
FLEXCAN_MBConfigType tMbCfg;
FLEXCAN_InterruptType tIntCfg;
uint8_t DMA_BUF_LEN_RX;
uint8_t pBufCounter;
FilterTo_FLEXCAN_RxMbFilterType *IdFilter_RX;
} tCanSerialPortFrameFlagchip;
void vCanSerialPortFrameInit(
tCanSerialPortFrameFlagchip *env,
FLEXCAN_Type *CANx, // FLEXCAN0
uint8 CAN_INDEX, // CAN0 = 0 ... CAN3 = 3
IRQn_Type IRQ_CAN, // FlexCAN0_IRQn ... FlexCAN3_IRQn
uint8 CAN_PRIORITY,
FLEXCAN_BaudType canBaudRate,
FLEXCAN_IdType canTypeFrame,
uint32_t canId,
FLEXCAN_ErrorInterruptCallBackType CAN_ErrorInterrupt_CallBack,
FLEXCAN_RxInterruptCallBackType CAN_RxInterrupt_CallBack,
FLEXCAN_RxInterruptCallBackType CAN_RxFifoInterrupt_CallBack,
FLEXCAN_TxInterruptCallBackType CAN_TxInterrupt_CallBack
);
void vCanSerialPortFrameDMAInit(
tCanSerialPortFrameFlagchip *env,
FLEXCAN_Type *CANx, // FLEXCAN0
uint8 CAN_INDEX, // CAN0 = 0 ... CAN3 = 3
IRQn_Type IRQ_CAN, // FlexCAN0_IRQn ... FlexCAN3_IRQn
uint8 CAN_PRIORITY,
DMA_ChannelType RX_DMA_CHANNEL,
DMA_RequestSourceType RX_DMA_CHANNEL_REQ, // DMA_REQ_FLEXCAN0
uint8_t *DMA_BUF,
uint8_t CountFilter,
uint32_t *IdFilter,
IRQn_Type IRQ_DMA,
uint8_t IRQ_DMA_PRIORITY,
uint8_t IRQ_DMA_CHANNEL_PRIORITY,
DMA_ChannelType DMA_CHANNEL_RX,
DMA_RequestSourceType DMA_CHANNEL_REQ_RX, // DMA_REQ_FLEXCAN0
const uint8_t *DMA_BUF_RX,
uint8_t DMA_BUF_LEN_RX,
const FilterTo_FLEXCAN_RxMbFilterType *IdFilter_RX,
uint8_t CountFilter_RX,
IRQn_Type IRQ_DMA_RX,
uint8_t IRQ_DMA_PRIORITY_RX,
uint8_t IRQ_DMA_CHANNEL_PRIORITY_RX,
FLEXCAN_BaudType canBaudRate,
FLEXCAN_IdType canTypeFrame,

396
Src/CanSerialPortFrame.c
View File

@ -60,7 +60,7 @@ void CanSerialPortFrameSetType(tCanSerialPortFrameFlagchip *env, FLEXCAN_IdType
static void
vCanSerialPortFrameInitStructure(tCanSerialPortFrameFlagchip *env, uint16_t rxDataLength, uint16_t rxSnifferLength) {
for (uint8_t i=0; i<COUNT_QUEUE; ++i) {
for (uint8_t i = 0; i < COUNT_QUEUE; ++i) {
env->rxDataQueue[i] = osMessageQueueNew(rxDataLength, sizeof(can_rx_message_type), NULL);
if (rxSnifferLength) {
env->rxDataSnifferQueue[i] = osMessageQueueNew(rxSnifferLength, sizeof(can_rx_message_type), NULL);
@ -71,165 +71,22 @@ vCanSerialPortFrameInitStructure(tCanSerialPortFrameFlagchip *env, uint16_t rxDa
}
void vCanSerialPortFrameInit(
tCanSerialPortFrameFlagchip *env,
FLEXCAN_Type *CANx, // FLEXCAN0
uint8 CAN_INDEX, // CAN0 = 0 ... CAN3 = 3
IRQn_Type IRQ_CAN, // FlexCAN0_IRQn ... FlexCAN3_IRQn
uint8 CAN_PRIORITY,
FLEXCAN_BaudType canBaudRate,
FLEXCAN_IdType canTypeFrame,
uint32_t canId,
FLEXCAN_ErrorInterruptCallBackType CAN_ErrorInterrupt_CallBack,
FLEXCAN_RxInterruptCallBackType CAN_RxInterrupt_CallBack,
FLEXCAN_RxInterruptCallBackType CAN_RxFifoInterrupt_CallBack,
FLEXCAN_TxInterruptCallBackType CAN_TxInterrupt_CallBack
) {
FLEXCAN_ErrorType tRetVal;
uint32_t u32FuncClk;
PCC_CtrlType bSP_PCC_Config;
env->can = CANx;
env->CAN_INDEX = CAN_INDEX;
BSP_CAN_INIT_CFG(&env->tInitCfg);
BSP_CAN_INIT_MBConfig(&env->tMbCfg);
env->tInitCfg.eBaudrate = canBaudRate;
env->tInitCfg.bEnRxFifo = TRUE;
env->tInitCfg.bEnDma = FALSE;
env->tInitCfg.bEnFd = FALSE;
env->tInitCfg.bEnBrs = FALSE;
env->tInitCfg.eMbDataWidth = FLEXCAN_DATAWIDTH_8;
u32FuncClk = PCC_GetPccFunctionClock(s_ePccCanTable[CAN_INDEX]);
env->tInitCfg.eClkSrcSel = FLEXCAN_CLOCK_FUNCTION; /* functional clock */
env->tInitCfg.eClkSrcHz = (FLEXCAN_BaudClkType) u32FuncClk; /* function clock frequency */
env->tInitCfg.eDirect = FLEXCAN_DIR_ENABLE_WITHOUT_TRIG;
tRetVal = FLEXCAN_Init(CAN_INDEX, &env->tInitCfg);
if (tRetVal == FLEXCAN_ERROR_OK) {
/* +++++++++++ can mb initial ++++++++++++ */
/* rx config */
/*
env->aRxFiltList[0].eRxFrameType = FLEXCAN_ID_STD;
env->aRxFiltList[0].u32RxCanId = 0U;
env->aRxFiltList[0].u32RxCanIdMask = 0U;
env->aRxFiltList[1].eRxFrameType = FLEXCAN_ID_STD;
env->aRxFiltList[1].u32RxCanId = 0U;
env->aRxFiltList[1].u32RxCanIdMask = 0U;
tMbCfg.pRxFilterMBList = env->aRxFiltList;
tMbCfg.u8RxFilterMBCnt = sizeof(env->aRxFiltList) / sizeof(env->aRxFiltList[0]);
*/
env->pRxFilterFifoList[0].eRxFrameType = FLEXCAN_ID_STD;
env->pRxFilterFifoList[0].u32RxCanId = 0U;
env->pRxFilterFifoList[0].u32RxCanIdMask = 0U;
env->pRxFilterFifoList[1].eRxFrameType = FLEXCAN_ID_STD;
env->pRxFilterFifoList[1].u32RxCanId = 0U;
env->pRxFilterFifoList[1].u32RxCanIdMask = 0U;
env->tMbCfg.pRxFilterMBList = env->pRxFilterFifoList;
env->tMbCfg.u8RxFilterMBCnt = sizeof(env->pRxFilterFifoList) / sizeof(env->pRxFilterFifoList[0]);
env->tMbCfg.pRxBuf = CAN_GET_BUFFER(CAN_INDEX);
/* tx config */
env->tMbCfg.u8TxMsgCnt = 3U; /* tx occupy 3 mb */
tRetVal = FLEXCAN_RxFilterConfig(CAN_INDEX, &env->tMbCfg);
if (CAN_ErrorInterrupt_CallBack == NULL) {
env->tIntCfg.bEnErrorInterrupt = 0U;
env->tIntCfg.pErrorNotify = NULL;
env->tIntCfg.bEnTxMBInterrupt = 0U;
env->tIntCfg.pRxMBNotify = NULL;
env->tIntCfg.bEnRxMBInterrupt = 0U;
env->tIntCfg.pRxFifoNotify = NULL;
env->tIntCfg.bEnRxFifoInterrupt = 0U;
env->tIntCfg.pTxMBNotify = NULL;
} else {
env->tIntCfg.bEnErrorInterrupt = 1U;
env->tIntCfg.pErrorNotify = CAN_ErrorInterrupt_CallBack;
env->tIntCfg.bEnTxMBInterrupt = 1U;
env->tIntCfg.pRxMBNotify = CAN_RxInterrupt_CallBack;
env->tIntCfg.bEnRxMBInterrupt = 1U;
env->tIntCfg.pRxFifoNotify = CAN_RxFifoInterrupt_CallBack;
env->tIntCfg.bEnRxFifoInterrupt = 1U;
env->tIntCfg.pTxMBNotify = CAN_TxInterrupt_CallBack;
}
if ((env->tIntCfg.bEnErrorInterrupt) ||
(env->tIntCfg.bEnTxMBInterrupt) ||
(env->tIntCfg.bEnRxMBInterrupt) ||
(env->tIntCfg.bEnRxFifoInterrupt)) {
NVIC_SetPriority(IRQ_CAN, CAN_PRIORITY);
NVIC_EnableIRQ(IRQ_CAN);
FLEXCAN_SetInterrupt(CAN_INDEX, &env->tIntCfg);
}
FLEXCAN_Start(CAN_INDEX); /* Start CAN */
}
if (!env->reInit) {
env->reInit = true;
vCanSerialPortFrameInitStructure(env, 10, 0);
CanSerialPortFrameSetType(env, canTypeFrame);
CanSerialPortFrameSetId(env, canId);
env->canBaudRate = canBaudRate;
}
}
void vCanSerialPortFrameDMAInit(
tCanSerialPortFrameFlagchip *env,
FLEXCAN_Type *CANx, // FLEXCAN0
uint8 CAN_INDEX, // CAN0 = 0 ... CAN3 = 3
IRQn_Type IRQ_CAN, // FlexCAN0_IRQn ... FlexCAN3_IRQn
uint8 CAN_PRIORITY,
DMA_ChannelType RX_DMA_CHANNEL,
DMA_RequestSourceType RX_DMA_CHANNEL_REQ, // DMA_REQ_FLEXCAN0
uint8_t *DMA_BUF,
uint8_t CountFilter,
uint32_t *IdFilter,
IRQn_Type IRQ_DMA,
uint8_t IRQ_DMA_PRIORITY,
uint8_t IRQ_DMA_CHANNEL_PRIORITY,
DMA_ChannelType DMA_CHANNEL_RX,
DMA_RequestSourceType DMA_CHANNEL_REQ_RX, // DMA_REQ_FLEXCAN0
const uint8_t *DMA_BUF_RX,
uint8_t DMA_BUF_LEN_RX,
const FilterTo_FLEXCAN_RxMbFilterType *IdFilter_RX,
uint8_t CountFilter_RX,
IRQn_Type IRQ_DMA_RX,
uint8_t IRQ_DMA_PRIORITY_RX,
uint8_t IRQ_DMA_CHANNEL_PRIORITY_RX,
FLEXCAN_BaudType canBaudRate,
FLEXCAN_IdType canTypeFrame,
@ -242,22 +99,81 @@ void vCanSerialPortFrameDMAInit(
DMA_TransferCompleteCallbackType DMA_TransferCompleteCallback,
DMA_TransferErrorCallbackType DMA_ErrorCallback
) {
env->g_u32RxDataIndex = 0;
env->can = CANx;
env->CAN_INDEX = CAN_INDEX;
env->CountFilter_RX = CountFilter_RX;
env->DMA_BUF_LEN_RX = DMA_BUF_LEN_RX;
env->IdFilter_RX = (FilterTo_FLEXCAN_RxMbFilterType *)IdFilter_RX;
//начало-----------------------------------DMA-RX-------------------------------------------------------------------
//начало-----------------------------------DMA-RX-------------------------------------------------------------------
//начало-----------------------------------DMA-RX-------------------------------------------------------------------
BSP_DMA_INIT_CFG(&env->dmaInitCfg_RX);
env->dmaInitCfg_RX.eArbitrationAlgorithm = DMA_ARBITRATION_ALGORITHM_FIXED_PRIORITY;
env->dmaInitCfg_RX.bHaltOnError = false;
DMA_Init(DMA_INSTANCE_0, &env->dmaInitCfg_RX);
uint32_t u32TargetAddr = (uint32_t) (DMA_BUF_RX);
env->chnCfg_RX.pSrcBuffer = &(CANx->RAM[0]);
env->chnCfg_RX.pDestBuffer = (void *) (u32TargetAddr);
env->chnCfg_RX.u32BlockSize = DMA_BUF_LEN_RX;
env->chnCfg_RX.u16BlockCount = 1U;
env->chnCfg_RX.u8ChannelPriority = IRQ_DMA_CHANNEL_PRIORITY_RX;
env->chnCfg_RX.eSrcDataSize = DMA_TRANSFER_SIZE_4B;
env->chnCfg_RX.eDestDataSize = DMA_TRANSFER_SIZE_4B;
env->chnCfg_RX.eSrcIncMode = DMA_INCREMENT_DATA_SIZE;
env->chnCfg_RX.eDestIncMode = DMA_INCREMENT_DATA_SIZE;
env->chnCfg_RX.bSrcBlockOffsetEn = 0U;
env->chnCfg_RX.bDestBlockOffsetEn = 0U;
env->chnCfg_RX.s32BlockOffset = 0;
env->chnCfg_RX.bSrcAddrLoopbackEn = 1U;
env->chnCfg_RX.bDestAddrLoopbackEn = false;
env->chnCfg_RX.bAutoStop = 0U;
env->chnCfg_RX.bSrcCircularBufferEn = false;
env->chnCfg_RX.u32SrcCircBufferSize = DMA_CIRCULAR_BUFFER_SIZE_1B;
env->chnCfg_RX.bDestCircularBufferEn = true;
env->chnCfg_RX.u32DestCircBufferSize = 256U;
env->chnCfg_RX.eTriggerSrc = DMA_CHANNEL_REQ_RX;
DMA_InitChannel(DMA_INSTANCE_0, (DMA_ChannelType) DMA_CHANNEL_RX, &env->chnCfg_RX);
env->interruptCfg_RX.bTransferCompleteIntEn = 1;
env->interruptCfg_RX.pTransferCompleteNotify = DMA_TransferCompleteCallback;
env->interruptCfg_RX.bTransferErrorIntEn = 1;
env->interruptCfg_RX.pTransferErrorNotify = DMA_ErrorCallback;
DMA_InitChannelInterrupt(DMA_INSTANCE_0, (DMA_ChannelType) DMA_CHANNEL_RX, &env->interruptCfg_RX);
NVIC_SetPriority(DMA_Error_IRQn, IRQ_DMA_PRIORITY_RX);
NVIC_SetPriority(IRQ_DMA_RX, IRQ_DMA_PRIORITY_RX);
NVIC_EnableIRQ(IRQ_DMA_RX);
DMA_StartChannel(DMA_INSTANCE_0, (DMA_ChannelType) DMA_CHANNEL_RX);
//конец-----------------------------------DMA-RX--------------------------------------------------------------------
//конец-----------------------------------DMA-RX--------------------------------------------------------------------
//конец-----------------------------------DMA-RX--------------------------------------------------------------------
//начало------------------------------------CAN---------------------------------------------------------------------
//начало------------------------------------CAN---------------------------------------------------------------------
//начало------------------------------------CAN---------------------------------------------------------------------
FLEXCAN_ErrorType tRetVal;
uint32_t u32FuncClk;
PCC_CtrlType bSP_PCC_Config;
env->g_u32RxDataIndex = 0;
env->can = CANx;
env->CAN_INDEX = CAN_INDEX;
tRetVal = FLEXCAN_DeInit(CAN_INDEX);
BSP_CAN_INIT_CFG(&env->tInitCfg);
BSP_CAN_INIT_MBConfig(&env->tMbCfg);
env->tInitCfg.eBaudrate = canBaudRate;
env->tInitCfg.eDataBaud = canBaudRate;
env->tInitCfg.bEnRxFifo = TRUE;
env->tInitCfg.bEnDma = TRUE;
@ -267,33 +183,30 @@ void vCanSerialPortFrameDMAInit(
u32FuncClk = PCC_GetPccFunctionClock(s_ePccCanTable[CAN_INDEX]);
env->tInitCfg.eClkSrcSel = FLEXCAN_CLOCK_FUNCTION; /* functional clock */
env->tInitCfg.eClkSrcHz = (FLEXCAN_BaudClkType) u32FuncClk; /* function clock frequency */
env->tInitCfg.eClkSrcSel = FLEXCAN_CLOCK_FUNCTION; // functional clock
env->tInitCfg.eClkSrcHz = (FLEXCAN_BaudClkType) u32FuncClk; // function clock frequency
env->tInitCfg.eDirect = FLEXCAN_DIR_ENABLE_WITHOUT_TRIG;
tRetVal = FLEXCAN_Init(CAN_INDEX, &env->tInitCfg);
if (tRetVal == FLEXCAN_ERROR_OK) {
/* +++++++++++ can mb initial ++++++++++++ */
for (uint8_t i=0; i<CountFilter; ++i) {
for (uint8_t i = 0; i < CountFilter_RX; ++i) {
env->pRxFilterFifoList[i].eRxFrameType = FLEXCAN_ID_STD;
env->pRxFilterFifoList[i].u32RxCanId = IdFilter[i];
env->pRxFilterFifoList[i].u32RxCanIdMask = 0U;
env->pRxFilterFifoList[i].eRxFrameType = IdFilter_RX[i].eRxFrameType;
env->pRxFilterFifoList[i].u32RxCanId = IdFilter_RX[i].u32RxCanId;
env->pRxFilterFifoList[i].u32RxCanIdMask = IdFilter_RX[i].u32RxCanIdMask;
}
env->tMbCfg.pRxFilterMBList = env->pRxFilterFifoList;
env->tMbCfg.u8RxFilterMBCnt = sizeof(env->pRxFilterFifoList) / sizeof(env->pRxFilterFifoList[0]);
env->tMbCfg.pRxFilterFifoList = env->pRxFilterFifoList;
env->tMbCfg.u8RxFilterFifoCnt = CountFilter_RX;
env->tMbCfg.pRxBuf = CAN_GET_BUFFER(CAN_INDEX);
/* tx config */
env->tMbCfg.u8TxMsgCnt = 3U; /* tx occupy 3 mb */
// tx config
env->tMbCfg.u8TxMsgCnt = 3U; // tx occupy 3 mb
tRetVal = FLEXCAN_RxFilterConfig(CAN_INDEX, &env->tMbCfg);
@ -326,71 +239,19 @@ void vCanSerialPortFrameDMAInit(
}
DMA_InitType dmaInitCfg;
BSP_DMA_INIT_CFG(&dmaInitCfg);
DMA_ChannelCfgType chnCfg = {0};
DMA_InterruptCfgType interruptCfg = {0};
uint32_t u32TargetAddr;
dmaInitCfg.eArbitrationAlgorithm = DMA_ARBITRATION_ALGORITHM_FIXED_PRIORITY;
dmaInitCfg.bHaltOnError = false;
DMA_Init(DMA_INSTANCE_0, &dmaInitCfg);
u32TargetAddr = (uint32_t) (DMA_BUF);
chnCfg.pSrcBuffer = &(CANx->RAM[0]);
chnCfg.pDestBuffer = (void *) (u32TargetAddr);
chnCfg.u32BlockSize = 16U;
chnCfg.u16BlockCount = 1U;
chnCfg.u8ChannelPriority = IRQ_DMA_CHANNEL_PRIORITY;
chnCfg.eSrcDataSize = DMA_TRANSFER_SIZE_4B;
chnCfg.eDestDataSize = DMA_TRANSFER_SIZE_4B;
chnCfg.eSrcIncMode = DMA_INCREMENT_DATA_SIZE;
chnCfg.eDestIncMode = DMA_INCREMENT_DATA_SIZE;
chnCfg.bSrcBlockOffsetEn = 0U;
chnCfg.bDestBlockOffsetEn = 0U;
chnCfg.s32BlockOffset = 0;
chnCfg.bSrcAddrLoopbackEn = 1U;
chnCfg.bDestAddrLoopbackEn = false;
chnCfg.bAutoStop = 0U;
chnCfg.bSrcCircularBufferEn = false;
chnCfg.u32SrcCircBufferSize = DMA_CIRCULAR_BUFFER_SIZE_1B;
chnCfg.bDestCircularBufferEn = true;
chnCfg.u32DestCircBufferSize = 256U;
chnCfg.eTriggerSrc = RX_DMA_CHANNEL_REQ;
DMA_InitChannel(DMA_INSTANCE_0, (DMA_ChannelType) RX_DMA_CHANNEL, &chnCfg);
interruptCfg.bTransferCompleteIntEn = 1;
interruptCfg.pTransferCompleteNotify = DMA_TransferCompleteCallback;
interruptCfg.bTransferErrorIntEn = 1;
interruptCfg.pTransferErrorNotify = DMA_ErrorCallback;
DMA_InitChannelInterrupt(DMA_INSTANCE_0, (DMA_ChannelType) RX_DMA_CHANNEL, &interruptCfg);
//NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUP_4);
NVIC_EnableIRQ(IRQ_DMA);
NVIC_SetPriority(DMA_Error_IRQn, IRQ_DMA_PRIORITY);
NVIC_SetPriority(IRQ_DMA, IRQ_DMA_PRIORITY);
DMA_StartChannel(DMA_INSTANCE_0, (DMA_ChannelType) RX_DMA_CHANNEL);
if ((env->tIntCfg.bEnErrorInterrupt) ||
(env->tIntCfg.bEnTxMBInterrupt) ||
(env->tIntCfg.bEnRxMBInterrupt) ||
(env->tIntCfg.bEnRxFifoInterrupt)) {
NVIC_EnableIRQ(IRQ_CAN);
NVIC_SetPriority(IRQ_CAN, CAN_PRIORITY);
NVIC_EnableIRQ(IRQ_CAN);
FLEXCAN_SetInterrupt(CAN_INDEX, &env->tIntCfg);
}
FLEXCAN_Start(CAN_INDEX); /* Start CAN */
FLEXCAN_Start(CAN_INDEX); // Start CAN
}
@ -404,26 +265,33 @@ void vCanSerialPortFrameDMAInit(
env->canBaudRate = canBaudRate;
}
//конец------------------------------------CAN----------------------------------------------------------------------
//конец------------------------------------CAN----------------------------------------------------------------------
//конец------------------------------------CAN----------------------------------------------------------------------
}
void CanSerialPortFrameAddDataQueue(tCanSerialPortFrameFlagchip *env, can_rx_message_type *rx_message_struct, uint8_t u8CanIndex) {
osMessageQueuePut(env->rxDataQueue[u8CanIndex], rx_message_struct, 0x0, 0U);
static void CanSerialPortFrameAddDataQueue(tCanSerialPortFrameFlagchip *env, can_rx_message_type *rx_message_struct,
uint8_t filter) {
osMessageQueuePut(env->rxDataQueue[filter], rx_message_struct, 0x0, 0U);
if (env->rxDataSnifferQueue[u8CanIndex]) {
osMessageQueuePut(env->rxDataSnifferQueue[u8CanIndex], rx_message_struct, 0x0, 0U);
if (env->rxDataSnifferQueue[filter]) {
osMessageQueuePut(env->rxDataSnifferQueue[filter], rx_message_struct, 0x0, 0U);
}
}
void CanSerialPortFrameIrqRxProcessing(tCanSerialPortFrameFlagchip *env, uint32_t *pBuf) {
can_rx_message_type rx_message_struct;
uint32_t u32TempAddr = (uint32_t) FLEXCAN_MB_WORDN_ADDR(pBuf, 0U, 8U, 0U);
// message buffer 1th word
uint32_t u32TempAddr = (uint32_t) FLEXCAN_MB_WORDN_ADDR(&pBuf[env->pBufCounter << 2], 0U, 8U, 0U);
uint32_t dlc = FLEXCAN_MB_DLC_GET(u32TempAddr);
rx_message_struct.dlc = FLEXCAN_DlcToDataLen(dlc);
rx_message_struct.id_type = FLEXCAN_MB_IDE_GET(u32TempAddr);
// message buffer 2th word
u32TempAddr = (uint32_t)FLEXCAN_MB_WORDN_ADDR(&pBuf[env->pBufCounter << 2], 0U, 8U, 4U);
if (rx_message_struct.id_type == FLEXCAN_ID_STD) {
rx_message_struct.standard_id = FLEXCAN_MB_STDID_GET(u32TempAddr);
@ -431,25 +299,26 @@ void CanSerialPortFrameIrqRxProcessing(tCanSerialPortFrameFlagchip *env, uint32_
rx_message_struct.extended_id = FLEXCAN_MB_EXTID_GET(u32TempAddr);
}
uint32_t *pSrc = (uint32_t *) FLEXCAN_MB_WORDN_ADDR(pBuf, 0U, 8U, 8U);
// message buffer 3th word
uint32_t *pSrc = (uint32_t *) FLEXCAN_MB_WORDN_ADDR(&pBuf[env->pBufCounter << 2], 0U, 8U, 8U);
uint32_t *pDest = (uint32_t *) &rx_message_struct.data[0];
uint32_t u32WordLen = rx_message_struct.dlc / 4U + (rx_message_struct.dlc % 4U > 0U ? 1U : 0U);
for (uint8_t u8Index = 0U; u8Index < u32WordLen; ++u8Index) {
for (uint32_t u8Index = 0U; u8Index < u32WordLen; ++u8Index) {
REV_BYTES_32(pSrc[u8Index], pDest[u8Index]);
}
rx_message_struct.filter_index = 0xFF;
rx_message_struct.filter_index = 0;
for (uint8_t i = 0; i < COUNT_QUEUE; ++i) {
for (uint8_t i = 0; i < env->CountFilter_RX; ++i) {
if ((rx_message_struct.id_type == FLEXCAN_ID_STD) &&
(env->pRxFilterFifoList[i].eRxFrameType == FLEXCAN_ID_STD)) {
(env->IdFilter_RX[i].eRxFrameType == FLEXCAN_ID_STD)) {
if (rx_message_struct.standard_id == env->pRxFilterFifoList[i].u32RxCanId) {
if (rx_message_struct.standard_id == env->IdFilter_RX[i].u32RxCanId) {
rx_message_struct.filter_index = i;
rx_message_struct.filter_index = env->IdFilter_RX[i].filter;
CanSerialPortFrameAddDataQueue(env, &rx_message_struct, i);
@ -457,11 +326,11 @@ void CanSerialPortFrameIrqRxProcessing(tCanSerialPortFrameFlagchip *env, uint32_
} else {
if (rx_message_struct.extended_id == env->pRxFilterFifoList[i].u32RxCanId) {
if (rx_message_struct.extended_id == env->IdFilter_RX[i].u32RxCanId) {
if (rx_message_struct.extended_id == env->pRxFilterFifoList[i].u32RxCanId) {
if (rx_message_struct.extended_id == env->IdFilter_RX[i].u32RxCanId) {
rx_message_struct.filter_index = i;
rx_message_struct.filter_index = env->IdFilter_RX[i].filter;
CanSerialPortFrameAddDataQueue(env, &rx_message_struct, i);
}
@ -474,47 +343,10 @@ void CanSerialPortFrameIrqRxProcessing(tCanSerialPortFrameFlagchip *env, uint32_
}
}
void CAN_RxInterrupt_CallBack_Handler(tCanSerialPortFrameFlagchip *env, uint8_t u8CanIndex, FLEXCAN_RxMsgType *pRxCfg) {
can_rx_message_type rx_message_struct;
rx_message_struct.standard_id = pRxCfg->u32CanId;
rx_message_struct.filter_index = u8CanIndex;
rx_message_struct.dlc = pRxCfg->u32DataLen;
memcpy(rx_message_struct.data, pRxCfg->aData, rx_message_struct.dlc);
for (uint8_t i = 0; i < COUNT_QUEUE; ++i) {
if ((rx_message_struct.id_type == FLEXCAN_ID_STD) &&
(env->pRxFilterFifoList[i].eRxFrameType == FLEXCAN_ID_STD)) {
if (rx_message_struct.standard_id == env->pRxFilterFifoList[i].u32RxCanId) {
rx_message_struct.filter_index = i;
CanSerialPortFrameAddDataQueue(env, &rx_message_struct, i);
}
} else {
if (rx_message_struct.extended_id == env->pRxFilterFifoList[i].u32RxCanId) {
if (rx_message_struct.extended_id == env->pRxFilterFifoList[i].u32RxCanId) {
rx_message_struct.filter_index = i;
CanSerialPortFrameAddDataQueue(env, &rx_message_struct, i);
}
}
}
++env->pBufCounter;
if (env->pBufCounter >= env->DMA_BUF_LEN_RX) {
env->pBufCounter = 0;
}
}
@ -591,7 +423,7 @@ uint16_t vCanSerialPortFrameTransmit(tCanSerialPortFrameFlagchip *env, uint8_t *
uint16_t len = 0;
for (uint16_t i = 0; i < fullSize; ++i) {
FCFUNC_FcOwnMemcpy(tTxMsg.aData, &data[len], fullSize, NULL);
FCFUNC_FcOwnMemcpy(tTxMsg.aData, &data[len], 8, NULL);
len += 8;
tRetval = FLEXCAN_TransmitData(env->CAN_INDEX, &tTxMsg);