From c73140e39b438bbaf1db4175b6e06b097b7b9a7b Mon Sep 17 00:00:00 2001 From: cfif Date: Fri, 17 Oct 2025 13:26:07 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9E=D0=B1=D0=BD=D0=BE=D0=B2=D0=BB=D0=B5?= =?UTF-8?q?=D0=BD=D0=B8=D0=B5?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Inc/AdcFlagchip.h | 4 ++- Src/AdcFlagchip.c | 87 +++++++++++++++++++++++------------------------ 2 files changed, 46 insertions(+), 45 deletions(-) diff --git a/Inc/AdcFlagchip.h b/Inc/AdcFlagchip.h index de3359f..c939743 100644 --- a/Inc/AdcFlagchip.h +++ b/Inc/AdcFlagchip.h @@ -29,7 +29,9 @@ typedef struct { } tAdcFlagchip; -tAdcFlagchip ADC_Initial( +void ADC_Initial( + tAdcFlagchip *env, + ADC_InstanceType ADCx, // ADC_INSTANCE_0, ADC_INSTANCE_1 DMA_ChannelType ADC_DMA_CHANNEL, // DMA_CHANNEL_0 .. DMA_CHANNEL_15 diff --git a/Src/AdcFlagchip.c b/Src/AdcFlagchip.c index b9f6c49..e5621a4 100644 --- a/Src/AdcFlagchip.c +++ b/Src/AdcFlagchip.c @@ -12,7 +12,8 @@ void Get_ADC_Result(tAdcFlagchip *env) { osMessageQueuePut(env->txAccessQueue, &DUMMY_BYTE, 0, 0); } -tAdcFlagchip ADC_Initial( +void ADC_Initial( + tAdcFlagchip *env, ADC_InstanceType ADCx, // ADC_INSTANCE_0, ADC_INSTANCE_1 DMA_ChannelType ADC_DMA_CHANNEL, // DMA_CHANNEL_0 .. DMA_CHANNEL_15 @@ -34,55 +35,54 @@ tAdcFlagchip ADC_Initial( ) { - tAdcFlagchip adc = { - .ADCx = ADCx, - .DMA_BUF = DMA_BUF, - .offset = offset, - .div = div, - .mux = mux, - .num_aChannels = num_aChannels, - .txAccessQueue = osMessageQueueNew(1, 1, NULL), - - .s_tAdcInitCfg = { - .eResolution = ADC_RESOLUTION_12_BIT, //!< 12 bit resolution - .eAlign = ADC_ALIGN_RIGHT, //!< Align right - .eTriggerMode = ADC_TRIGMODE_SW, //!< Software trigger - .bWaitEnable = false, //!< Disable wait conversion mode - .bCalEnable = false, - .s32CalOffset = 0U, - .s32CalGain = 0U, - .bSequenceGroupModeEnable = false, //!< Disable sequence group mode - .eTrgLatchUnitPri = TRG_LATCH_UNIT_PRI_ROUND_ROBIN, //!< Round robin priority - .eClockDivider = ADC_CLOCK_DIV_1, //!< Adc clock divided by 1 - .eSequenceMode = ADC_SEQMODE_SINGLE, //!< Single sequence mode - .eOverrunMode = ADC_OVERRUN_MODE_PRESERVE, //!< When overrun occurred, the old conversion data are preserved - - .eVoltageRef = ADC_REF_INTERNAL, //!< Use internal reference - .bHwAvgEnable = false, //!< Disable averaging functionality - .eHwAverage = ADC_AVERAGE_4, //!< Selection for number of samples used for averaging - .aSampleTimes = {4U, 10U, 40U, 80U}, //!< ADC channel sample time options - }, - - .s_tAdcDmaCfg = { - .bDmaEnable = true, - .eSeqGroupIndex = ADC_SEQUENCE_GROUP_0, - .eDmaInstance = DMA_INSTANCE_0, - .eDmaChannel = ADC_DMA_CHANNEL, - .u8ChannelPriority = IRQ_DMA_CHANNEL_PRIORITY, - .pResultBuffer = (void *) ((uint32_t) DMA_BUF), - .pConvCompleteNotify = Bsp_ADC_HandleResult, - } - - }; + env->ADCx = ADCx; + env->DMA_BUF = (uint32_t *) DMA_BUF; + env->offset = offset; + env->div = div; + env->mux = mux; + env->num_aChannels = num_aChannels; + env->txAccessQueue = osMessageQueueNew(1, 1, NULL); - ADC_Init(ADCx, &adc.s_tAdcInitCfg); + env->s_tAdcInitCfg.eResolution = ADC_RESOLUTION_12_BIT, //!< 12 bit resolution + env->s_tAdcInitCfg.eAlign = ADC_ALIGN_RIGHT, //!< Align right + env->s_tAdcInitCfg.eTriggerMode = ADC_TRIGMODE_SW, //!< Software trigger + env->s_tAdcInitCfg.bWaitEnable = false; //!< Disable wait conversion mode + + env->s_tAdcInitCfg.bCalEnable = false; + env->s_tAdcInitCfg.s32CalOffset = 0U; + env->s_tAdcInitCfg.s32CalGain = 0U; + env->s_tAdcInitCfg.bSequenceGroupModeEnable = false; //!< Disable sequence group mode + env->s_tAdcInitCfg.eTrgLatchUnitPri = TRG_LATCH_UNIT_PRI_ROUND_ROBIN; //!< Round robin priority + env->s_tAdcInitCfg.eClockDivider = ADC_CLOCK_DIV_1; //!< Adc clock divided by 1 + env->s_tAdcInitCfg.eSequenceMode = ADC_SEQMODE_SINGLE; //!< Single sequence mode + env->s_tAdcInitCfg.eOverrunMode = ADC_OVERRUN_MODE_PRESERVE; //!< When overrun occurred, the old conversion data are preserved + + env->s_tAdcInitCfg.eVoltageRef = ADC_REF_INTERNAL; //!< Use internal reference + env->s_tAdcInitCfg.bHwAvgEnable = false; //!< Disable averaging functionality + env->s_tAdcInitCfg.eHwAverage = ADC_AVERAGE_4; //!< Selection for number of samples used for averaging + env->s_tAdcInitCfg.aSampleTimes[0] = 4U; + env->s_tAdcInitCfg.aSampleTimes[1] = 10U; + env->s_tAdcInitCfg.aSampleTimes[2] = 40U; + env->s_tAdcInitCfg.aSampleTimes[3] = 80U; + + + env->s_tAdcDmaCfg.bDmaEnable = true; + env->s_tAdcDmaCfg.eSeqGroupIndex = ADC_SEQUENCE_GROUP_0; + env->s_tAdcDmaCfg.eDmaInstance = DMA_INSTANCE_0; + env->s_tAdcDmaCfg.eDmaChannel = ADC_DMA_CHANNEL; + env->s_tAdcDmaCfg.u8ChannelPriority = IRQ_DMA_CHANNEL_PRIORITY; + env->s_tAdcDmaCfg.pResultBuffer = (void *) ((uint32_t) DMA_BUF); + env->s_tAdcDmaCfg.pConvCompleteNotify = Bsp_ADC_HandleResult; + + + ADC_Init(ADCx, &env->s_tAdcInitCfg); ADC_InitChannel(ADCx, s_aChannels, num_aChannels); - ADC_InitDmaChannel(ADCx, &adc.s_tAdcDmaCfg); + ADC_InitDmaChannel(ADCx, &env->s_tAdcDmaCfg); ADC_Enable(ADC_INSTANCE_0); NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUP_4); @@ -91,7 +91,6 @@ tAdcFlagchip ADC_Initial( NVIC_SetPriority(DMA_Error_IRQn, IRQ_DMA_PRIORITY); NVIC_SetPriority(IRQ_DMA, IRQ_DMA_PRIORITY); - return adc; } static float *vAdcGet(tAdcFlagchip *env, uint32_t timeout) {