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SerialPortUSB_ARTERY_AT32F435_437
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This commit is contained in:
cfif 2026-04-03 16:16:12 +03:00
parent 99715179a4
commit a49de7ba16
3 changed files with 236 additions and 98 deletions
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221
SerialPort_USB.c
View File

@ -5,26 +5,37 @@
#include "SystemDelayInterface.h"
#include "CmsisRtosThreadUtils.h"
otg_core_type otg_core_struct;
#if (OTG1_USB_ID == 1)
otg_core_type otg1_core_struct;
tSerialPortUsbArtery *SerialPortUsbArteryOtg1 = NULL;
#endif
#if (OTG2_USB_ID == 1)
otg_core_type otg2_core_struct;
tSerialPortUsbArtery *SerialPortUsbArteryOtg2 = NULL;
#endif
void usb_delay_ms(uint32_t ms) {
SystemDelayMs(ms);
}
void OTG_IRQ_HANDLER(void) {
usbd_irq_handler(&otg_core_struct);
#if (OTG1_USB_ID == 1)
void OTG1_IRQ_HANDLER(void) {
usbd_irq_handler(&otg1_core_struct);
if (SerialPortUsbArteryOtg1 != NULL) {
uint16_t data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, SerialPortUsbArteryOtg1->usb_buffer);
uint16_t data_len = usb_vcp_get_rxdata(&otg1_core_struct.dev, SerialPortUsbArteryOtg1->usb_buffer);
if (data_len > 0) {
for (uint16_t i = 0; i < data_len; ++i) {
osMessageQueuePut(SerialPortUsbArteryOtg1->rxDataQueue, &SerialPortUsbArteryOtg1->usb_buffer[i], 0x0, 0U);
osMessageQueuePut(SerialPortUsbArteryOtg1->rxDataQueue, &SerialPortUsbArteryOtg1->usb_buffer[i], 0x0,
0U);
if (SerialPortUsbArteryOtg1->rxDataSnifferQueue) {
osMessageQueuePut(SerialPortUsbArteryOtg1->rxDataSnifferQueue, &SerialPortUsbArteryOtg1->usb_buffer[i], 0x0, 0U);
osMessageQueuePut(SerialPortUsbArteryOtg1->rxDataSnifferQueue,
&SerialPortUsbArteryOtg1->usb_buffer[i], 0x0, 0U);
}
}
@ -34,7 +45,36 @@ void OTG_IRQ_HANDLER(void) {
}
void usb_clock48m_select(usb_clk48_s clk_s) {
#endif
#if (OTG2_USB_ID == 1)
void OTG2_IRQ_HANDLER(void) {
usbd_irq_handler(&otg2_core_struct);
if (SerialPortUsbArteryOtg2 != NULL) {
uint16_t data_len = usb_vcp_get_rxdata(&otg2_core_struct.dev, SerialPortUsbArteryOtg2->usb_buffer);
if (data_len > 0) {
for (uint16_t i = 0; i < data_len; ++i) {
osMessageQueuePut(SerialPortUsbArteryOtg2->rxDataQueue, &SerialPortUsbArteryOtg2->usb_buffer[i], 0x0,
0U);
if (SerialPortUsbArteryOtg2->rxDataSnifferQueue) {
osMessageQueuePut(SerialPortUsbArteryOtg2->rxDataSnifferQueue,
&SerialPortUsbArteryOtg2->usb_buffer[i], 0x0, 0U);
}
}
}
}
}
#endif
void usb_clock48m_select(usb_clk48_s clk_s, uint8_t USB_ID) {
if (clk_s == USB_CLK_HICK) {
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
@ -45,11 +85,15 @@ void usb_clock48m_select(usb_clk48_s clk_s) {
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
#if (USB_ID == 0)
acc_sof_select(ACC_SOF_OTG1);
#else
acc_sof_select(ACC_SOF_OTG2);
#endif
if (USB_ID == 1) {
acc_sof_select(ACC_SOF_OTG1);
}
if (USB_ID == 2) {
acc_sof_select(ACC_SOF_OTG2);
}
// open acc calibration
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
} else {
@ -116,10 +160,10 @@ void usb_clock48m_select(usb_clk48_s clk_s) {
}
}
void usb_gpio_config(void) {
void usb1_gpio_config(void) {
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
crm_periph_clock_enable(OTG1_PIN_GPIO_CLOCK, TRUE);
gpio_default_para_init(&gpio_init_struct);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
@ -128,11 +172,46 @@ void usb_gpio_config(void) {
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
// dp and dm
gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
gpio_init_struct.gpio_pins = OTG1_PIN_DP | OTG1_PIN_DM;
gpio_init(OTG1_PIN_GPIO, &gpio_init_struct);
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
gpio_pin_mux_config(OTG1_PIN_GPIO, OTG1_PIN_DP_SOURCE, OTG1_PIN_MUX);
gpio_pin_mux_config(OTG1_PIN_GPIO, OTG1_PIN_DM_SOURCE, OTG1_PIN_MUX);
#ifdef USB_SOF_OUTPUT_ENABLE
crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
gpio_init_struct.gpio_pins = OTG_PIN_SOF;
gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
#endif
#ifndef USB_VBUS_IGNORE
gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
#endif
}
void usb2_gpio_config(void) {
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
gpio_default_para_init(&gpio_init_struct);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
// dp and dm
gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
#ifdef USB_SOF_OUTPUT_ENABLE
crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
@ -213,10 +292,19 @@ static uint16_t vSerialPortReceiveQueue(
static uint16_t vSerialPortUsbTransmit(tSerialPortUsbArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
if (usb_vcp_send_data(&otg_core_struct.dev, data, size) == SUCCESS) {
return size;
if (env->USB_ID == 1) {
if (usb_vcp_send_data(&otg1_core_struct.dev, data, size) == SUCCESS) {
return size;
}
}
if (env->USB_ID == 2) {
if (usb_vcp_send_data(&otg2_core_struct.dev, data, size) == SUCCESS) {
return size;
}
}
return 0;
}
@ -224,11 +312,13 @@ static uint16_t vSerialPortUsbReceive(tSerialPortUsbArtery *env, uint8_t *data,
return vSerialPortReceiveQueue(env, data, size, timeout, env->rxDataQueue);
}
static uint16_t vSerialPortUsbSnifferReceive(tSerialPortUsbArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
static uint16_t
vSerialPortUsbSnifferReceive(tSerialPortUsbArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
return env->rxDataSnifferQueue
? vSerialPortReceiveQueue(env, data, size, timeout, env->rxDataSnifferQueue)
: 0;
}
/*
static _Noreturn void UsbDriver_Thread(tSerialPortUsbArtery *env) {
for (;;) {
@ -259,11 +349,13 @@ void UsbDriver_StartThread(tSerialPortUsbArtery *env) {
*/
void SerialPortUsb_Init(
tSerialPortUsbArtery *env,
uint8_t USB_ID,
uint32_t rxBufferLength,
uint32_t rxSnifferLength
) {
env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
env->USB_ID = USB_ID;
env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
if (rxSnifferLength) {
env->rxDataSnifferQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
@ -271,36 +363,77 @@ void SerialPortUsb_Init(
env->rxDataSnifferQueue = 0;
}
SerialPortUsbArteryOtg1 = env;
// usb gpio config
usb_gpio_config();
if (env->USB_ID == 1) {
#ifdef USB_LOW_POWER_WAKUP
usb_low_power_wakeup_config();
#if (OTG1_USB_ID == 1)
SerialPortUsbArteryOtg1 = env;
// usb gpio config
usb1_gpio_config();
#endif
// enable otgfs clock
crm_periph_clock_enable(OTG_CLOCK, TRUE);
#ifdef USB_LOW_POWER_WAKUP
usb_low_power_wakeup_config();
#endif
// select usb 48m clcok source
usb_clock48m_select(USB_CLK_HEXT);
#if (OTG1_USB_ID == 1)
// enable otgfs clock
crm_periph_clock_enable(OTG1_CLOCK, TRUE);
// enable otgfs irq
//nvic_irq_enable(OTG_IRQ, 0, 0);
NVIC_EnableIRQ(OTG_IRQ);
NVIC_SetPriority(OTG_IRQ, 0xFF);
// select usb 48m clcok source
usb_clock48m_select(USB_CLK_HEXT, env->USB_ID);
// init usb
usbd_init(&otg_core_struct,
USB_FULL_SPEED_CORE_ID,
USB_ID,
&cdc_class_handler,
&cdc_desc_handler);
// enable otgfs irq
//nvic_irq_enable(OTG_IRQ, 0, 0);
NVIC_EnableIRQ(OTG1_IRQ);
NVIC_SetPriority(OTG1_IRQ, 0xFF);
InitThreadAtrStatic(&env->thread.attr, "UsbDriver", env->thread.controlBlock, env->thread.stack, osPriorityNormal);
env->thread.id = 0;
// init usb
usbd_init(&otg1_core_struct,
USB_FULL_SPEED_CORE_ID,
USB1_ID,
&cdc_class_handler,
&cdc_desc_handler);
// InitThreadAtrStatic(&env->thread.attr, "UsbDriver", env->thread.controlBlock, env->thread.stack, osPriorityNormal);
// env->thread.id = 0;
#endif
}
if (env->USB_ID == 2) {
#if (OTG2_USB_ID == 1)
SerialPortUsbArteryOtg2 = env;
// usb gpio config
usb2_gpio_config();
#endif
#ifdef USB_LOW_POWER_WAKUP
usb_low_power_wakeup_config();
#endif
#if (OTG2_USB_ID == 1)
// enable otgfs clock
crm_periph_clock_enable(OTG2_CLOCK, TRUE);
// select usb 48m clcok source
usb_clock48m_select(USB_CLK_HEXT, env->USB_ID);
// enable otgfs irq
//nvic_irq_enable(OTG_IRQ, 0, 0);
NVIC_EnableIRQ(OTG2_IRQ);
NVIC_SetPriority(OTG2_IRQ, 0xFF);
// init usb
usbd_init(&otg2_core_struct,
USB_FULL_SPEED_CORE_ID,
USB2_ID,
&cdc_class_handler,
&cdc_desc_handler);
// InitThreadAtrStatic(&env->thread.attr, "UsbDriver", env->thread.controlBlock, env->thread.stack, osPriorityNormal);
// env->thread.id = 0;
#endif
}
//UsbDriver_StartThread(env);
}

16
SerialPort_USB.h
View File

@ -16,12 +16,15 @@
typedef struct {
osMessageQueueId_t rxDataQueue;
osMessageQueueId_t rxDataSnifferQueue;
struct {
osThreadId_t id;
uint32_t stack[1024];
StaticTask_t controlBlock;
osThreadAttr_t attr;
} thread;
uint8_t USB_ID;
// struct {
// osThreadId_t id;
// uint32_t stack[1024];
// StaticTask_t controlBlock;
// osThreadAttr_t attr;
// } thread;
ALIGNED_HEAD uint8_t usb_buffer[256] ALIGNED_TAIL;
@ -29,6 +32,7 @@ typedef struct {
void SerialPortUsb_Init(
tSerialPortUsbArtery *env,
uint8_t USB_ID,
uint32_t rxBufferLength,
uint32_t rxSnifferLength
);

97
usb_conf.h
View File

@ -57,73 +57,74 @@ extern "C" {
*/
/* use otgfs1 */
#define OTG_USB_ID 1
#define OTG1_USB_ID 1
#define OTG2_USB_ID 1
/* use otgfs2 */
//#define OTG_USB_ID 2
#define OTG_USB_ID 2
#if (OTG_USB_ID == 1)
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#if (OTG1_USB_ID == 1)
#define USB1_ID 0
#define OTG1_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG1_IRQ OTGFS1_IRQn
#define OTG1_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG1_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG1_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG1_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG1_PIN_GPIO GPIOA
#define OTG1_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG1_PIN_DP GPIO_PINS_12
#define OTG1_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG1_PIN_DM GPIO_PINS_11
#define OTG1_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG1_PIN_VBUS GPIO_PINS_9
#define OTG1_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG1_PIN_ID GPIO_PINS_10
#define OTG1_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG1_PIN_SOF_GPIO GPIOA
#define OTG1_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG1_PIN_SOF GPIO_PINS_8
#define OTG1_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#define OTG1_PIN_MUX GPIO_MUX_10
#endif
#if (OTG_USB_ID == 2)
#define USB_ID 1
#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG_IRQ OTGFS2_IRQn
#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#if (OTG2_USB_ID == 1)
#define USB2_ID 1
#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG2_IRQ OTGFS2_IRQn
#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG2_PIN_GPIO GPIOB
#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_15
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG2_PIN_DP GPIO_PINS_15
#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG_PIN_DM GPIO_PINS_14
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG2_PIN_DM GPIO_PINS_14
#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG2_PIN_VBUS GPIO_PINS_13
#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG2_PIN_ID GPIO_PINS_12
#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG2_PIN_SOF_GPIO GPIOA
#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG2_PIN_SOF GPIO_PINS_4
#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_12
#define OTG2_PIN_MUX GPIO_MUX_12
#endif
/**