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HVAC_DEV_SpiPorts
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Init

This commit is contained in:
cfif 2026-04-23 12:10:21 +03:00
parent a8ae5f13d8
commit f6e176498f
2 changed files with 74 additions and 0 deletions
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66
SpiPorts.c
View File

@ -62,10 +62,76 @@ static tSpiPortArtery vSpiPort_InitSPI2(tGpioPin *chipSelect) {
} }
static void vSpiPort_InitSPI3RxTxPin() {
gpio_init_type GPIO_InitStruct;
gpio_default_para_init(&GPIO_InitStruct);
//// spi3 sck pin
GPIO_InitStruct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
GPIO_InitStruct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
GPIO_InitStruct.gpio_pull = GPIO_PULL_NONE;
GPIO_InitStruct.gpio_mode = GPIO_MODE_MUX;
GPIO_InitStruct.gpio_pins = GPIO_PINS_10;
gpio_init(GPIOC, &GPIO_InitStruct);
gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
//// spi3 mosi pin
GPIO_InitStruct.gpio_pull = GPIO_PULL_NONE;
GPIO_InitStruct.gpio_pins = GPIO_PINS_0;
gpio_init(GPIOB, &GPIO_InitStruct);
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE0, GPIO_MUX_7);
}
static tSpiPortArtery vSpiPort_InitSPI3(tGpioPin *chipSelect) {
vSpiPort_InitSPI3RxTxPin();
return vSpiPortInitName(SPI3, SPI_FRAME_8BIT, SPI_MCLK_DIV_32, SPI_CLOCK_POLARITY_LOW, SPI_CLOCK_PHASE_1EDGE, chipSelect);
}
static void vSpiPort_InitSPI4RxTxPin() {
gpio_init_type GPIO_InitStruct;
gpio_default_para_init(&GPIO_InitStruct);
//// spi4 sck pin
GPIO_InitStruct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
GPIO_InitStruct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
GPIO_InitStruct.gpio_pull = GPIO_PULL_NONE;
GPIO_InitStruct.gpio_mode = GPIO_MODE_MUX;
GPIO_InitStruct.gpio_pins = GPIO_PINS_2;
gpio_init(GPIOE, &GPIO_InitStruct);
gpio_pin_mux_config(GPIOE, GPIO_PINS_SOURCE2, GPIO_MUX_5);
//// spi4 mosi pin
GPIO_InitStruct.gpio_pull = GPIO_PULL_NONE;
GPIO_InitStruct.gpio_pins = GPIO_PINS_6;
gpio_init(GPIOE, &GPIO_InitStruct);
gpio_pin_mux_config(GPIOE, GPIO_PINS_SOURCE6, GPIO_MUX_5);
}
static tSpiPortArtery vSpiPort_InitSPI4(tGpioPin *chipSelect) {
vSpiPort_InitSPI4RxTxPin();
return vSpiPortInitName(SPI4, SPI_FRAME_8BIT, SPI_MCLK_DIV_32, SPI_CLOCK_POLARITY_LOW, SPI_CLOCK_PHASE_1EDGE, chipSelect);
}
void SpiPorts_Init(tSpiChipSelectPins *SpiChipSelectPins) { void SpiPorts_Init(tSpiChipSelectPins *SpiChipSelectPins) {
SPI_PORTS.Spi1 = vSpiPort_InitSPI1(&SpiChipSelectPins->spi1ChipSelect); SPI_PORTS.Spi1 = vSpiPort_InitSPI1(&SpiChipSelectPins->spi1ChipSelect);
SPI_PORTS.Spi1_IO = vSpiPortGetIo(&SPI_PORTS.Spi1); SPI_PORTS.Spi1_IO = vSpiPortGetIo(&SPI_PORTS.Spi1);
SPI_PORTS.Spi2 = vSpiPort_InitSPI2(&SpiChipSelectPins->spi2ChipSelect); SPI_PORTS.Spi2 = vSpiPort_InitSPI2(&SpiChipSelectPins->spi2ChipSelect);
SPI_PORTS.Spi2_IO = vSpiPortGetIo(&SPI_PORTS.Spi2); SPI_PORTS.Spi2_IO = vSpiPortGetIo(&SPI_PORTS.Spi2);
SPI_PORTS.Spi3 = vSpiPort_InitSPI3(&SpiChipSelectPins->spi3ChipSelect);
SPI_PORTS.Spi3_IO = vSpiPortGetIo(&SPI_PORTS.Spi3);
SPI_PORTS.Spi4 = vSpiPort_InitSPI4(&SpiChipSelectPins->spi4ChipSelect);
SPI_PORTS.Spi4_IO = vSpiPortGetIo(&SPI_PORTS.Spi4);
} }

8
SpiPorts.h
View File

@ -10,6 +10,8 @@
typedef struct { typedef struct {
tGpioPin spi1ChipSelect; tGpioPin spi1ChipSelect;
tGpioPin spi2ChipSelect; tGpioPin spi2ChipSelect;
tGpioPin spi3ChipSelect;
tGpioPin spi4ChipSelect;
} tSpiChipSelectPins; } tSpiChipSelectPins;
typedef struct { typedef struct {
@ -18,6 +20,12 @@ typedef struct {
tSpiPortArtery Spi2; tSpiPortArtery Spi2;
tSpiPortIO Spi2_IO; tSpiPortIO Spi2_IO;
tSpiPortArtery Spi3;
tSpiPortIO Spi3_IO;
tSpiPortArtery Spi4;
tSpiPortIO Spi4_IO;
} tSpiPorts; } tSpiPorts;
extern tSpiPorts SPI_PORTS; extern tSpiPorts SPI_PORTS;