383 lines
12 KiB
C
383 lines
12 KiB
C
/* Copyright Statement:
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*
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* This software/firmware and related documentation ("AutoChips Software") are
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* protected under relevant copyright laws. The information contained herein is
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* confidential and proprietary to AutoChips Inc. and/or its licensors. Without
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* the prior written permission of AutoChips inc. and/or its licensors, any
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* reproduction, modification, use or disclosure of AutoChips Software, and
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* information contained herein, in whole or in part, shall be strictly
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* prohibited.
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*
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* AutoChips Inc. (C) 2021. All rights reserved.
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*
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* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
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* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("AUTOCHIPS SOFTWARE")
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* RECEIVED FROM AUTOCHIPS AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
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* ON AN "AS-IS" BASIS ONLY. AUTOCHIPS EXPRESSLY DISCLAIMS ANY AND ALL
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* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
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* NONINFRINGEMENT. NEITHER DOES AUTOCHIPS PROVIDE ANY WARRANTY WHATSOEVER WITH
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* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
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* INCORPORATED IN, OR SUPPLIED WITH THE AUTOCHIPS SOFTWARE, AND RECEIVER AGREES
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* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
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* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
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* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN AUTOCHIPS
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* SOFTWARE. AUTOCHIPS SHALL ALSO NOT BE RESPONSIBLE FOR ANY AUTOCHIPS SOFTWARE
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* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
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* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND AUTOCHIPS'S
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* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE AUTOCHIPS SOFTWARE
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* RELEASED HEREUNDER WILL BE, AT AUTOCHIPS'S OPTION, TO REVISE OR REPLACE THE
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* AUTOCHIPS SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
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* CHARGE PAID BY RECEIVER TO AUTOCHIPS FOR SUCH AUTOCHIPS SOFTWARE AT ISSUE.
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*/
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/*!
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* @file timer_hw.h
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*
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* @brief This file provides timer integration functions interface.
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*
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*/
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/* PRQA S 4342,4304,4394 EOF */ /* Type conversion. */
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#ifndef TIMER_HW_H
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#define TIMER_HW_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/* =========================================== Includes =========================================== */
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#include "timer_drv.h"
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/* ============================================ Define ============================================ */
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/* =========================================== Typedef ============================================ */
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/* ========================================== Variables =========================================== */
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/* ==================================== Functions declaration ===================================== */
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/* ===================================== Functions definition ===================================== */
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/*!
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* @brief Enables the functional clock of the TIMER module.
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*
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* @param[in] base: TIMER base address
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* @return None
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*/
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static inline void TIMER_Enable(TIMER_CTRL_Type * const base)
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{
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MODIFY_REG32(base->CR, TIMER_CTRL_CR_MC_EN_Msk, TIMER_CTRL_CR_MC_EN_Pos, 1U);
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}
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/*!
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* @brief Disables the functional clock of TIMER module.
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*
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* @param[in] base: TIMER base address
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* @return None
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*/
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static inline void TIMER_Disable(TIMER_CTRL_Type * const base)
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{
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MODIFY_REG32(base->CR, TIMER_CTRL_CR_MC_EN_Msk, TIMER_CTRL_CR_MC_EN_Pos, 0U);
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}
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/*!
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* @brief Starts the timer channel counting.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: Timer channels starting mask
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* @return None
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*/
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static inline void TIMER_StartChannels(TIMER_CTRL_Type * const base, uint32_t mask)
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{
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SET_BIT32(base->ENR, mask);
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}
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/*!
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* @brief Stops the timer channel from counting.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: Timer channels stopping mask
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* @return None
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*/
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static inline void TIMER_StopChannels(TIMER_CTRL_Type * const base, uint32_t mask)
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{
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CLEAR_BIT32(base->ENR, mask);
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}
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/*!
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* @brief Sets the timer channel period in count unit.
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*
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* @param[in] base: TIMER base address
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* @param[in] count: Timer channel period in count unit
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* @return None
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*/
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static inline void TIMER_SetPeriodByCount(TIMER_CHANNEL_Type * const base, uint32_t count)
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{
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WRITE_REG32(base->TVAL, count);
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}
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/*!
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* @brief Gets the timer channel period in count unit.
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*
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* @param[in] base: TIMER base address
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* @return Timer channel period in count unit
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*/
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static inline uint32_t TIMER_GetPeriodByCount(const TIMER_CHANNEL_Type * base)
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{
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return (base->TVAL);
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}
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/*!
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* @brief Sets the current timer channel counting value.
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*
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* @param[in] base: TIMER base address
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* @param[in] count: counting value to be set
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* @return None
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*/
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static inline void TIMER_SetCurrentCount(TIMER_CHANNEL_Type * const base, uint32_t count)
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{
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WRITE_REG32(base->CVAL, count);
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}
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/*!
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* @brief Gets the current timer channel counting value.
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*
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* @param[in] base: TIMER base address
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* @return Current timer channel counting value
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*/
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static inline uint32_t TIMER_GetCurrentCount(const TIMER_CHANNEL_Type * base)
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{
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return (base->CVAL);
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}
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/*!
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* @brief Enables the interrupt generation for timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: The interrupt enabling mask
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* @return None
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*/
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static inline void TIMER_EnableInterrupt(TIMER_CTRL_Type * const base, uint32_t mask)
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{
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SET_BIT32(base->IER, mask);
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}
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/*!
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* @brief Disables the interrupt for timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: The interrupt disabling mask
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* @return None
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*/
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static inline void TIMER_DisableInterrupt(TIMER_CTRL_Type * const base, uint32_t mask)
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{
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CLEAR_BIT32(base->IER, mask);
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}
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/*!
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* @brief Gets the interrupt flag of timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: The interrupt flag getting mask
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* @return The interrupt flag of timer channels
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*/
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static inline uint32_t TIMER_GetInterruptFlag(const TIMER_CTRL_Type * base, uint32_t mask)
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{
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return READ_BIT32(base->SR, mask);
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}
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/*!
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* @brief Clears the interrupt flag of timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] mask: The interrupt flag clearing mask
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* @return None
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*/
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static inline void TIMER_ClearInterruptFlag(TIMER_CTRL_Type * const base, uint32_t mask)
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{
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WRITE_REG32(base->SR, mask);
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}
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/*!
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* @brief Sets operation mode of timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] mode: Operation mode of timer channel
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* @return None
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*/
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static inline void TIMER_SetChannelModeCmd(TIMER_CHANNEL_Type * const base, timer_modes_t mode)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_MODE_Msk, TIMER_CHANNEL_CTRL_MODE_Pos, mode);
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}
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/*!
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* @brief Gets current operation mode of timer channel.
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*
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* @param[in] base: TIMER base address
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* @return Operation mode of timer channel
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*/
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static inline timer_modes_t TIMER_GetChannelModeCmd(const TIMER_CHANNEL_Type * base)
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{
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uint32_t tmp;
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timer_modes_t mode;
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tmp = ((READ_BIT32(base->CTRL, TIMER_CHANNEL_CTRL_MODE_Msk)) >> TIMER_CHANNEL_CTRL_MODE_Pos);
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switch (tmp)
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{
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case 0x00U:
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mode = TIMER_PERIODIC_COUNTER;
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break;
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case 0x01U:
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mode = TIMER_DUAL_PERIODIC_COUNTER;
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break;
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case 0x02U:
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mode = TIMER_TRIGGER_ACCUMULATOR;
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break;
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case 0x03U:
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mode = TIMER_INPUT_CAPTURE;
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break;
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default:
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mode = TIMER_PERIODIC_COUNTER;
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break;
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}
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return mode;
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}
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/*!
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* @brief Sets Read cval register presivison.
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*
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* @param[in] base: TIMER base address
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* @param[in] sel: Read cval register presivison value
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* @return None
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*/
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static inline void TIMER_SetChannelCavlReadSel(TIMER_CHANNEL_Type * const base, timer_sel_t sel)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_CVAL_SEL_Msk, TIMER_CHANNEL_CTRL_CVAL_SEL_Pos, sel);
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}
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/*!
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* @brief Gets Read cval register presivison.
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*
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* @param[in] base: TIMER base address
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* @return timer sel value
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*/
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static inline timer_sel_t TIMER_GetChannelCavlReadSel(TIMER_CHANNEL_Type * const base)
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{
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DEVICE_ASSERT(base != NULL);
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return ((timer_sel_t)(READ_BIT32(base->CTRL, TIMER_CHANNEL_CTRL_CVAL_SEL_Msk) >> TIMER_CHANNEL_CTRL_CVAL_SEL_Pos));
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}
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/*!
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* @brief Sets internal trigger source for timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] triggerChannelSelect: Number of the channel selected as trigger source
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* @return None
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*/
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static inline void TIMER_SetTriggerSelectCmd(TIMER_CHANNEL_Type * const base, uint32_t triggerChannelSelect)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TTRG_SEL_Msk, TIMER_CHANNEL_CTRL_TTRG_SEL_Pos, triggerChannelSelect);
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}
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/*!
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* @brief Sets trigger source of timer channel.
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*
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* @param[in] base: TIMER base address
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* @param[in] triggerSource: internal or external source seted as Trigger source of timer channel
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* @return None
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*/
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static inline void TIMER_SetTriggerSourceCmd(TIMER_CHANNEL_Type * const base, timer_trigger_source_t triggerSource)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TRG_SRC_Msk, TIMER_CHANNEL_CTRL_TRG_SRC_Pos, triggerSource);
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}
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/*!
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* @brief Sets timer channel reload on trigger.
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*
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* @param[in] base: TIMER base address
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* @param[in] isReloadOnTrigger: Timer channel reload on trigger
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* @return None
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*/
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static inline void TIMER_SetReloadOnTriggerCmd(TIMER_CHANNEL_Type * const base, bool isReloadOnTrigger)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TROT_Msk, TIMER_CHANNEL_CTRL_TROT_Pos, isReloadOnTrigger);
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}
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/*!
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* @brief Sets timer channel stop on interrupt.
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*
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* @param[in] base: TIMER base address
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* @param[in] isStopOnInterrupt: Timer channel stop on interrupt
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* @return None
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*/
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static inline void TIMER_SetStopOnInterruptCmd(TIMER_CHANNEL_Type * const base, bool isStopOnInterrupt)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TSOI_Msk, TIMER_CHANNEL_CTRL_TSOI_Pos, isStopOnInterrupt);
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}
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/*!
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* @brief Sets timer channel start on trigger.
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*
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* @param[in] base: TIMER base address
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* @param[in] isStartOnTrigger: Timer channel start on trigger
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* @return None
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*/
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static inline void TIMER_SetStartOnTriggerCmd(TIMER_CHANNEL_Type * const base, bool isStartOnTrigger)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TSOT_Msk, TIMER_CHANNEL_CTRL_TSOT_Pos, isStartOnTrigger);
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}
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/*!
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* @brief Sets timer channel to be chained or not chained. (The timer channel 0 cannot be chained)
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*
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* @param[in] base: TIMER base address
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* @param[in] isChannelChained Timer channel chaining control
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* @return None
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*/
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static inline void TIMER_SetChannelChainCmd(TIMER_CHANNEL_Type * const base, bool isChannelChained)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_CHN_EN_Msk, TIMER_CHANNEL_CTRL_CHN_EN_Pos, isChannelChained);
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}
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/*!
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* @brief Sets operation of TIMER in debug mode.
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*
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* @param[in] base: TIMER base address
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* @param[in] isRunInDebug: enable or disable TIMER run in debug mode
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* @return None
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*/
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static inline void TIMER_SetRunInDebugCmd(TIMER_CTRL_Type * const base, bool isRunInDebug)
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{
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MODIFY_REG32(base->CR, TIMER_CTRL_CR_DBG_EN_Msk, TIMER_CTRL_CR_DBG_EN_Pos, isRunInDebug);
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}
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/*!
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* @brief Set timer channel timeout value update time.
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*
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* @param[in] base: TIMER base address
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* @param[in] state: timer period take effect mode selection
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- period value take effect when timout occured
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- period value take effect immediately
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* @return None
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*/
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static inline void TIMER_SetValueUpdate(TIMER_CHANNEL_Type * const base, bool state)
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{
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MODIFY_REG32(base->CTRL, TIMER_CHANNEL_CTRL_TVAL_UP_Msk, TIMER_CHANNEL_CTRL_TVAL_UP_Pos, state);
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}
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* TIMER_HW_H */
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/* ============================================= EOF ============================================== */
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