801 lines
26 KiB
C
801 lines
26 KiB
C
//
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// Created by cfif on 16.09.22.
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//
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#include <SystemDelayInterface.h>
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#include "SerialPortArtery.h"
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#include "string.h"
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void vSerialPortInit(
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tSerialPortArtery *env,
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usart_type *uart,
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bool swap,
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uint32_t BoundRate,
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IRQn_Type irq,
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crm_periph_clock_type uartClock,
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uint8_t irqPriority,
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uint32_t rxBufferLength,
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uint32_t rxSnifferLength
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) {
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usart_reset(uart);
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crm_periph_clock_enable(uartClock, TRUE);
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usart_init(uart, BoundRate, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(uart, TRUE);
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usart_receiver_enable(uart, TRUE);
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if (swap) {
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usart_transmit_receive_pin_swap(uart, TRUE);
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}
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usart_enable(uart, TRUE);
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usart_interrupt_enable(uart, USART_RDBF_INT, TRUE);
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NVIC_EnableIRQ(irq);
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NVIC_SetPriority(irq, irqPriority);
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env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
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if (rxSnifferLength) {
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env->rxDataSnifferQueue = osMessageQueueNew(rxSnifferLength, 1, NULL);
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} else {
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env->rxDataSnifferQueue = 0;
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}
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env->uart = uart;
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}
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void vSerialPortInitExt(
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tSerialPortArtery *env,
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usart_type *uart,
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bool swap,
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usart_hardware_flow_control_type flow_control_type,
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uint32_t BoundRate,
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IRQn_Type irq,
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crm_periph_clock_type uartClock,
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uint8_t irqPriority,
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uint32_t rxBufferLength,
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uint32_t rxSnifferLength
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) {
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usart_reset(uart);
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crm_periph_clock_enable(uartClock, TRUE);
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usart_init(uart, BoundRate, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_hardware_flow_control_set(uart, flow_control_type);
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usart_transmitter_enable(uart, TRUE);
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usart_receiver_enable(uart, TRUE);
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if (swap) {
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usart_transmit_receive_pin_swap(uart, TRUE);
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}
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usart_enable(uart, TRUE);
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usart_interrupt_enable(uart, USART_RDBF_INT, TRUE);
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NVIC_EnableIRQ(irq);
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NVIC_SetPriority(irq, irqPriority);
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env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
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if (rxSnifferLength) {
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env->rxDataSnifferQueue = osMessageQueueNew(rxSnifferLength, 1, NULL);
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} else {
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env->rxDataSnifferQueue = 0;
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}
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env->uart = uart;
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}
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void vSerialPortInitDMA(
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tSerialPortArtery *env,
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usart_type *uart,
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dma_type *DMA_RX,
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dma_type *DMA_TX,
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dma_channel_type *RX_DMA_CHANNEL,
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dmamux_channel_type *RX_DMA_CHANNEL_MUX,
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dmamux_requst_id_sel_type RX_DMAMUX_DMAREQ_ID,
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IRQn_Type RX_DMA_Channel_IRQ,
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uint32_t RX_DMA_FDT_FLAG,
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uint8_t *DMA_BUF,
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uint16_t DMA_BUF_LEN,
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dma_channel_type *TX_DMA_CHANNEL,
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dmamux_channel_type *TX_DMA_CHANNEL_MUX,
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dmamux_requst_id_sel_type TX_DMAMUX_DMAREQ_ID,
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IRQn_Type TX_DMA_Channel_IRQ,
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uint32_t TX_DMA_FDT_FLAG,
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bool swap,
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uint32_t BoundRate,
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IRQn_Type irq,
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crm_periph_clock_type uartClock,
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uint8_t irqPriority,
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uint32_t rxBufferLength,
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uint32_t rxSnifferLength
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) {
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{
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if (DMA_RX)NVIC_DisableIRQ(RX_DMA_Channel_IRQ);
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if (DMA_TX)NVIC_DisableIRQ(TX_DMA_Channel_IRQ);
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NVIC_DisableIRQ(irq);
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}
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/*включаем тактирование uart и нужных DMA */{
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crm_periph_clock_enable(uartClock, TRUE);
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if (DMA_RX == DMA1 || DMA_TX == DMA1) {
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crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
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}
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if (DMA_RX == DMA2 || DMA_TX == DMA2) {
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crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
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}
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}
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/*заполняем параметры и создаем все очереди до начала работы порта (иначе при раннем сробатывании прервывания все упадет)*/{
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env->txAccessQueue = osMessageQueueNew(1, 1, NULL);
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env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
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if (rxSnifferLength) {
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env->rxDataSnifferQueue = osMessageQueueNew(rxSnifferLength, 1, NULL);
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} else {
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env->rxDataSnifferQueue = 0;
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}
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env->rxDmaFdtFlag = RX_DMA_FDT_FLAG;
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env->txDmaFdtFlag = TX_DMA_FDT_FLAG;
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env->txDmaChannel = TX_DMA_CHANNEL;
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env->rxDmaChannel = RX_DMA_CHANNEL;
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env->rxDmaBuf = DMA_BUF;
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env->rxDmaOffset = 0;
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}
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/*инициализируем uart */{
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env->uart = uart;
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usart_reset(uart);
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usart_init(uart, BoundRate, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(uart, TRUE);
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usart_receiver_enable(uart, TRUE);
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usart_dma_receiver_enable(uart, TRUE);
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usart_dma_transmitter_enable(uart, TRUE);
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if (swap) {
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usart_transmit_receive_pin_swap(uart, TRUE);
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}
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}
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/*инициализируем RX DMA в циклическом режиме*/if (DMA_RX) {
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dmamux_enable(DMA_RX, TRUE);
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// dma channel for usart rx configuration
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dma_reset(RX_DMA_CHANNEL);
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dma_default_para_init(&env->dma_rx_init_struct);
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env->dma_rx_init_struct.buffer_size = DMA_BUF_LEN;
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env->dma_rx_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
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env->dma_rx_init_struct.memory_base_addr = (uint32_t) DMA_BUF;
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env->dma_rx_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
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env->dma_rx_init_struct.memory_inc_enable = TRUE;
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env->dma_rx_init_struct.peripheral_base_addr = (uint32_t) &uart->dt;
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env->dma_rx_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
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env->dma_rx_init_struct.peripheral_inc_enable = FALSE;
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env->dma_rx_init_struct.priority = DMA_PRIORITY_HIGH;
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env->dma_rx_init_struct.loop_mode_enable = TRUE;
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dma_init(RX_DMA_CHANNEL, &env->dma_rx_init_struct);
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// config flexible dma for usart7 rx
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dmamux_init(RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID);
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}
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/*инициализируем TX DMA*/if (DMA_TX) {
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dmamux_enable(DMA_TX, TRUE);
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// dma channel for usart tx configuration
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dma_reset(TX_DMA_CHANNEL);
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dma_default_para_init(&env->dma_tx_init_struct);
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env->dma_tx_init_struct.buffer_size = 0;
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env->dma_tx_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
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env->dma_tx_init_struct.memory_base_addr = 0;
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env->dma_tx_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.memory_inc_enable = TRUE;
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env->dma_tx_init_struct.peripheral_base_addr = (uint32_t) &uart->dt;
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env->dma_tx_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.peripheral_inc_enable = FALSE;
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env->dma_tx_init_struct.priority = DMA_PRIORITY_HIGH;
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env->dma_tx_init_struct.loop_mode_enable = FALSE;
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dma_init(TX_DMA_CHANNEL, &env->dma_tx_init_struct);
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// config flexible dma for usart7 tx
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dmamux_init(TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID);
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}
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/*включаем rx dma и прерывания на нем*/if (DMA_RX) {
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dma_interrupt_enable(RX_DMA_CHANNEL, DMA_FDT_INT, TRUE);
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NVIC_EnableIRQ(RX_DMA_Channel_IRQ);
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NVIC_SetPriority(RX_DMA_Channel_IRQ, irqPriority);
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dma_channel_enable(RX_DMA_CHANNEL, TRUE); // uart7 rx begin dma receiving
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}
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/*включаем прерывания на tx dma*/if (DMA_TX) {
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dma_interrupt_enable(TX_DMA_CHANNEL, DMA_FDT_INT, TRUE);
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NVIC_EnableIRQ(TX_DMA_Channel_IRQ);
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NVIC_SetPriority(TX_DMA_Channel_IRQ, irqPriority);
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}
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/*включаем uart и прерывания на нем*/{
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usart_interrupt_enable(uart, USART_IDLE_INT, TRUE);
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// usart_interrupt_enable(uart, USART_RDBF_INT, FALSE);
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NVIC_EnableIRQ(irq);
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NVIC_SetPriority(irq, irqPriority);
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usart_enable(uart, TRUE);
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}
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}
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void vSerialPortInitDMAExt(
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tSerialPortArtery *env,
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usart_type *uart,
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dma_type *DMA_RX,
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dma_type *DMA_TX,
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dma_channel_type *RX_DMA_CHANNEL,
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dmamux_channel_type *RX_DMA_CHANNEL_MUX,
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dmamux_requst_id_sel_type RX_DMAMUX_DMAREQ_ID,
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IRQn_Type RX_DMA_Channel_IRQ,
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uint32_t RX_DMA_FDT_FLAG,
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uint8_t *DMA_BUF,
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uint16_t DMA_BUF_LEN,
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dma_channel_type *TX_DMA_CHANNEL,
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dmamux_channel_type *TX_DMA_CHANNEL_MUX,
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dmamux_requst_id_sel_type TX_DMAMUX_DMAREQ_ID,
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IRQn_Type TX_DMA_Channel_IRQ,
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uint32_t TX_DMA_FDT_FLAG,
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bool swap,
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usart_hardware_flow_control_type flow_control_type,
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uint32_t BoundRate,
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IRQn_Type irq,
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crm_periph_clock_type uartClock,
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uint8_t irqPriority,
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uint32_t rxBufferLength,
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uint32_t rxSnifferLength
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) {
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/*включаем тактирование uart и нужных DMA */{
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crm_periph_clock_enable(uartClock, TRUE);
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if (DMA_RX == DMA1 || DMA_TX == DMA1) {
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crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
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}
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if (DMA_RX == DMA2 || DMA_TX == DMA2) {
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crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
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}
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}
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/*заполняем параметры и создаем все очереди до начала работы порта (иначе при раннем сробатывании прервывания все упадет)*/{
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env->txAccessQueue = osMessageQueueNew(1, 1, NULL);
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env->rxDataQueue = osMessageQueueNew(rxBufferLength, 1, NULL);
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if (rxSnifferLength) {
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env->rxDataSnifferQueue = osMessageQueueNew(rxSnifferLength, 1, NULL);
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} else {
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env->rxDataSnifferQueue = 0;
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}
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env->rxDmaFdtFlag = RX_DMA_FDT_FLAG;
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env->txDmaFdtFlag = TX_DMA_FDT_FLAG;
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env->txDmaChannel = TX_DMA_CHANNEL;
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env->rxDmaChannel = RX_DMA_CHANNEL;
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env->rxDmaBuf = DMA_BUF;
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env->rxDmaOffset = 0;
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}
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/*инициализируем uart */{
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env->uart = uart;
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usart_reset(uart);
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usart_init(uart, BoundRate, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_hardware_flow_control_set(uart, flow_control_type);
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usart_transmitter_enable(uart, TRUE);
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usart_receiver_enable(uart, TRUE);
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usart_dma_receiver_enable(uart, TRUE);
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usart_dma_transmitter_enable(uart, TRUE);
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if (swap) {
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usart_transmit_receive_pin_swap(uart, TRUE);
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}
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}
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/*инициализируем RX DMA в циклическом режиме*/if (DMA_RX) {
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dmamux_enable(DMA_RX, TRUE);
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// dma channel for usart rx configuration
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dma_reset(RX_DMA_CHANNEL);
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dma_default_para_init(&env->dma_rx_init_struct);
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env->dma_rx_init_struct.buffer_size = DMA_BUF_LEN;
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env->dma_rx_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
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env->dma_rx_init_struct.memory_base_addr = (uint32_t) DMA_BUF;
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env->dma_rx_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
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env->dma_rx_init_struct.memory_inc_enable = TRUE;
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env->dma_rx_init_struct.peripheral_base_addr = (uint32_t) &uart->dt;
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env->dma_rx_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
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env->dma_rx_init_struct.peripheral_inc_enable = FALSE;
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env->dma_rx_init_struct.priority = DMA_PRIORITY_HIGH;
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env->dma_rx_init_struct.loop_mode_enable = TRUE;
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dma_init(RX_DMA_CHANNEL, &env->dma_rx_init_struct);
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// config flexible dma for usart7 rx
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dmamux_init(RX_DMA_CHANNEL_MUX, RX_DMAMUX_DMAREQ_ID);
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}
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/*инициализируем TX DMA*/if (DMA_TX) {
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dmamux_enable(DMA_TX, TRUE);
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// dma channel for usart tx configuration
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dma_reset(TX_DMA_CHANNEL);
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dma_default_para_init(&env->dma_tx_init_struct);
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env->dma_tx_init_struct.buffer_size = 0;
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env->dma_tx_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
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env->dma_tx_init_struct.memory_base_addr = 0;
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env->dma_tx_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.memory_inc_enable = TRUE;
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env->dma_tx_init_struct.peripheral_base_addr = (uint32_t) &uart->dt;
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env->dma_tx_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.peripheral_inc_enable = FALSE;
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env->dma_tx_init_struct.priority = DMA_PRIORITY_HIGH;
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env->dma_tx_init_struct.loop_mode_enable = FALSE;
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dma_init(TX_DMA_CHANNEL, &env->dma_tx_init_struct);
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// config flexible dma for usart7 tx
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dmamux_init(TX_DMA_CHANNEL_MUX, TX_DMAMUX_DMAREQ_ID);
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}
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/*включаем rx dma и прерывания на нем*/if (DMA_RX) {
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dma_interrupt_enable(RX_DMA_CHANNEL, DMA_FDT_INT, TRUE);
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NVIC_EnableIRQ(RX_DMA_Channel_IRQ);
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NVIC_SetPriority(RX_DMA_Channel_IRQ, irqPriority);
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dma_channel_enable(RX_DMA_CHANNEL, TRUE); // uart7 rx begin dma receiving
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}
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/*включаем прерывания на tx dma*/if (DMA_TX) {
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dma_interrupt_enable(TX_DMA_CHANNEL, DMA_FDT_INT, TRUE);
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NVIC_EnableIRQ(TX_DMA_Channel_IRQ);
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NVIC_SetPriority(TX_DMA_Channel_IRQ, irqPriority);
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}
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/*включаем uart и прерывания на нем*/{
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usart_interrupt_enable(uart, USART_IDLE_INT, TRUE);
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// usart_interrupt_enable(uart, USART_RDBF_INT, FALSE);
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NVIC_EnableIRQ(irq);
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NVIC_SetPriority(irq, irqPriority);
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usart_enable(uart, TRUE);
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}
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}
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void vSerialPortSendDMA(
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tSerialPortArtery *env,
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usart_type *uart,
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dma_type *DMA,
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dma_channel_type *DMA_CHANNEL,
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dmamux_channel_type *DMA_CHANNEL_MUX,
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dmamux_requst_id_sel_type DMAMUX_DMAREQ_ID,
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uint8_t *DMA_BUF,
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uint16_t DMA_BUF_LEN
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) {
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dma_channel_enable(DMA_CHANNEL, FALSE);
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// dma channel for usart tx configuration
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dma_reset(DMA_CHANNEL);
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dma_default_para_init(&env->dma_tx_init_struct);
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env->dma_tx_init_struct.buffer_size = DMA_BUF_LEN;
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env->dma_tx_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
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env->dma_tx_init_struct.memory_base_addr = (uint32_t) DMA_BUF;
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env->dma_tx_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.memory_inc_enable = TRUE;
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env->dma_tx_init_struct.peripheral_base_addr = (uint32_t) &uart->dt;
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env->dma_tx_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
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env->dma_tx_init_struct.peripheral_inc_enable = FALSE;
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env->dma_tx_init_struct.priority = DMA_PRIORITY_MEDIUM;
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env->dma_tx_init_struct.loop_mode_enable = FALSE;
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dma_init(DMA_CHANNEL, &env->dma_tx_init_struct);
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// config flexible dma for usart7 tx
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dmamux_init(DMA_CHANNEL_MUX, DMAMUX_DMAREQ_ID);
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dma_channel_enable(DMA_CHANNEL, TRUE);
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}
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/*
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void vSerialPortIrqProcessingDMA(tSerialPortArtery *env) {
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||
dma_channel_enable(env->dma_channel, FALSE);
|
||
|
||
uint32_t len = env->dma_init_struct.buffer_size - env->dma_channel->dtcnt;
|
||
env->offset = len;
|
||
|
||
for (uint32_t i = 0; i < len; ++i) {
|
||
osMessageQueuePut(env->rxDataQueue, &env->dma_buf[i], 0x0, 0U);
|
||
if (env->rxDataSnifferQueue) {
|
||
osMessageQueuePut(env->rxDataSnifferQueue, &env->dma_buf[i], 0x0, 0U);
|
||
}
|
||
}
|
||
|
||
dma_init(env->dma_channel, &env->dma_init_struct);
|
||
dma_channel_enable(env->dma_channel, TRUE);
|
||
}
|
||
*/
|
||
|
||
|
||
void SerialPortFilter_RxDmaBufToQueue(tSerialPortArtery *env, uint32_t bufEnd,
|
||
tSerialPortIO *virtualPort,
|
||
uint16_t *counterBufFilterStr, uint8_t *bufStrFilter, uint16_t maxBufStrFilter,
|
||
const char *FilterStr[], uint8_t countFiler) {
|
||
|
||
for (uint32_t i = env->rxDmaOffset; i < bufEnd; ++i) {
|
||
osMessageQueuePut(env->rxDataQueue, &env->rxDmaBuf[i], 0x0, 0U);
|
||
if (env->rxDataSnifferQueue) {
|
||
|
||
if (*counterBufFilterStr < maxBufStrFilter) {
|
||
bufStrFilter[*counterBufFilterStr] = env->rxDmaBuf[i];
|
||
++*counterBufFilterStr;
|
||
} else {
|
||
*counterBufFilterStr = 0;
|
||
}
|
||
|
||
bool isFilterFind = false;
|
||
if (env->rxDmaBuf[i] == '\n') {
|
||
|
||
for (uint8_t j = 0; j < countFiler; ++j) {
|
||
if (memcmp(bufStrFilter, FilterStr[j], strlen(FilterStr[j])) == 0) {
|
||
|
||
SerialPortTransmit(virtualPort, bufStrFilter, *counterBufFilterStr, 0);
|
||
|
||
isFilterFind = true;
|
||
break;
|
||
}
|
||
}
|
||
|
||
if (isFilterFind == false) {
|
||
for (uint16_t j = 0; j < *counterBufFilterStr; ++j)
|
||
osMessageQueuePut(env->rxDataSnifferQueue, &bufStrFilter[j], 0x0, 0U);
|
||
}
|
||
|
||
*counterBufFilterStr = 0;
|
||
memset(bufStrFilter, 0, maxBufStrFilter);
|
||
}
|
||
|
||
}
|
||
}
|
||
|
||
}
|
||
|
||
void SerialPort_RxDmaBufToQueue(tSerialPortArtery *env, uint32_t bufEnd) {
|
||
osStatus_t res;
|
||
for (uint32_t i = env->rxDmaOffset; i < bufEnd; ++i) {
|
||
osMessageQueuePut(env->rxDataQueue, &env->rxDmaBuf[i], 0x0, 0U);
|
||
if (env->rxDataSnifferQueue) {
|
||
osMessageQueuePut(env->rxDataSnifferQueue, &env->rxDmaBuf[i], 0x0, 0U);
|
||
}
|
||
}
|
||
|
||
}
|
||
|
||
void SerialPort_IrqProcessing_UartIdle(tSerialPortArtery *env) {
|
||
// Смотрим idle прерывание
|
||
if (usart_flag_get(env->uart, USART_IDLEF_FLAG)) {
|
||
// Сброс прерывания
|
||
usart_data_receive(env->uart);
|
||
usart_flag_clear(env->uart, USART_IDLEF_FLAG);
|
||
size_t bufEnd = env->dma_rx_init_struct.buffer_size - env->rxDmaChannel->dtcnt;
|
||
SerialPort_RxDmaBufToQueue(env, bufEnd);
|
||
env->rxDmaOffset = bufEnd;
|
||
}
|
||
}
|
||
|
||
void SerialPort_IrqProcessing_DmaRxLoop(tSerialPortArtery *env) {
|
||
if (dma_flag_get(env->rxDmaFdtFlag)) {
|
||
SerialPort_RxDmaBufToQueue(env, env->dma_rx_init_struct.buffer_size);
|
||
env->rxDmaOffset = 0;
|
||
dma_flag_clear(env->rxDmaFdtFlag);
|
||
}
|
||
}
|
||
|
||
|
||
void
|
||
SerialPort_IrqProcessingFilter_UartIdle(tSerialPortArtery *env,
|
||
tSerialPortIO *virtualPort,
|
||
uint16_t *counterBufFilterStr, uint8_t *bufStrFilter, uint16_t maxBufStrFilter,
|
||
const char *FilterStr[], uint8_t countFiler) {
|
||
// Смотрим idle прерывание
|
||
if (usart_flag_get(env->uart, USART_IDLEF_FLAG)) {
|
||
// Сброс прерывания
|
||
usart_data_receive(env->uart);
|
||
usart_flag_clear(env->uart, USART_IDLEF_FLAG);
|
||
size_t bufEnd = env->dma_rx_init_struct.buffer_size - env->rxDmaChannel->dtcnt;
|
||
SerialPortFilter_RxDmaBufToQueue(env, bufEnd, virtualPort, counterBufFilterStr, bufStrFilter, maxBufStrFilter,
|
||
FilterStr,
|
||
countFiler);
|
||
env->rxDmaOffset = bufEnd;
|
||
}
|
||
}
|
||
|
||
void
|
||
SerialPort_IrqProcessingFilter_DmaRxLoop(tSerialPortArtery *env,
|
||
tSerialPortIO *virtualPort,
|
||
uint16_t *counterBufFilterStr, uint8_t *bufStrFilter, uint16_t maxBufStrFilter,
|
||
const char *FilterStr[], uint8_t countFiler) {
|
||
if (dma_flag_get(env->rxDmaFdtFlag)) {
|
||
SerialPortFilter_RxDmaBufToQueue(env, env->dma_rx_init_struct.buffer_size,
|
||
virtualPort,
|
||
counterBufFilterStr, bufStrFilter, maxBufStrFilter,
|
||
FilterStr, countFiler);
|
||
env->rxDmaOffset = 0;
|
||
dma_flag_clear(env->rxDmaFdtFlag);
|
||
}
|
||
}
|
||
|
||
|
||
static const uint8_t DUMMY_BYTE = 0xFF;
|
||
|
||
void SerialPort_IrqProcessing_DmaTx(tSerialPortArtery *env) {
|
||
if (dma_flag_get(env->txDmaFdtFlag)) {
|
||
dma_flag_clear(env->txDmaFdtFlag);
|
||
osMessageQueuePut(env->txAccessQueue, &DUMMY_BYTE, 0, 0);
|
||
}
|
||
}
|
||
|
||
void SerialPort_IrqProcessing_DmaTxBlind(tSerialPortArtery *env) {
|
||
if (dma_flag_get(env->txDmaFdtFlag)) {
|
||
dma_flag_clear(env->txDmaFdtFlag);
|
||
// osMessageQueuePut(env->txAccessQueue, &DUMMY_BYTE, 0, 0);
|
||
}
|
||
}
|
||
|
||
|
||
void vSerialPortIrqProcessing(tSerialPortArtery *env) {
|
||
|
||
uint8_t data;
|
||
while (usart_flag_get(env->uart, USART_RDBF_FLAG)) {
|
||
data = usart_data_receive(env->uart);
|
||
osMessageQueuePut(env->rxDataQueue, &data, 0x0, 0U);
|
||
if (env->rxDataSnifferQueue) {
|
||
osMessageQueuePut(env->rxDataSnifferQueue, &data, 0x0, 0U);
|
||
}
|
||
}
|
||
}
|
||
|
||
|
||
static uint16_t vSerialPortReceiveQueue(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout,
|
||
osMessageQueueId_t queueId) {
|
||
uint16_t received = 0;
|
||
|
||
|
||
if (timeout) {
|
||
uint32_t endMs = SystemGetMs() + timeout;
|
||
uint32_t leftMs;
|
||
|
||
while (size && ((timeout == SystemWaitForever) || (endMs > SystemGetMs()))) {
|
||
leftMs = endMs - SystemGetMs();
|
||
if (osMessageQueueGet(queueId, data, NULL, leftMs) == osOK) {
|
||
--size;
|
||
++received;
|
||
++data;
|
||
}
|
||
}
|
||
|
||
} else {
|
||
while (size) {
|
||
if (osMessageQueueGet(queueId, data, NULL, 0) == osOK) {
|
||
--size;
|
||
++received;
|
||
++data;
|
||
} else {
|
||
return received;
|
||
}
|
||
}
|
||
}
|
||
|
||
return received;
|
||
|
||
}
|
||
|
||
static uint16_t vSerialPortReceive(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
return vSerialPortReceiveQueue(env, data, size, timeout, env->rxDataQueue);
|
||
}
|
||
|
||
static uint16_t vSerialPortReceiveSniffer(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
|
||
return env->rxDataSnifferQueue
|
||
? vSerialPortReceiveQueue(env, data, size, timeout, env->rxDataSnifferQueue)
|
||
: 0;
|
||
}
|
||
|
||
static uint16_t vSerialPortReceiveSnifferSecond(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
|
||
return env->rxDataSnifferSecondQueue
|
||
? vSerialPortReceiveQueue(env, data, size, timeout, env->rxDataSnifferSecondQueue)
|
||
: 0;
|
||
}
|
||
|
||
static uint16_t vSerialPortTransmitOverDma(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
uint16_t sent = 0;
|
||
uint32_t endMs = SystemGetMs() + timeout;
|
||
|
||
dma_channel_enable(env->txDmaChannel, FALSE);
|
||
env->dma_tx_init_struct.buffer_size = size;
|
||
env->dma_tx_init_struct.memory_base_addr = (uint32_t) data;
|
||
dma_init(env->txDmaChannel, &env->dma_tx_init_struct);
|
||
dma_channel_enable(env->txDmaChannel, TRUE);
|
||
|
||
uint8_t res;
|
||
|
||
sent = (osMessageQueueGet(env->txAccessQueue, &res, 0, timeout) == osOK) ? size : 0;
|
||
|
||
// SystemDelayMs(10);
|
||
//
|
||
// while ((timeout == SystemWaitForever) || (endMs > SystemGetMs())) {
|
||
// if (dma_flag_get(env->txDmaFdtFlag) != RESET)
|
||
// break;
|
||
// SystemDelayMs(5);
|
||
// }
|
||
|
||
while ((timeout == SystemWaitForever) || (endMs > SystemGetMs())) {
|
||
if (usart_flag_get(env->uart, USART_TDC_FLAG))
|
||
break;
|
||
}
|
||
|
||
dma_channel_enable(env->txDmaChannel, FALSE);
|
||
|
||
// sent = size;
|
||
return sent;
|
||
}
|
||
|
||
static uint16_t
|
||
vSerialPortTransmitOverCore(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
uint16_t sent = 0;
|
||
uint32_t endMs = SystemGetMs() + timeout;
|
||
|
||
while (size && ((timeout == SystemWaitForever) || (endMs > SystemGetMs()))) {
|
||
|
||
if (usart_flag_get(env->uart, USART_TDBE_FLAG)) {
|
||
usart_data_transmit(env->uart, *data);
|
||
--size;
|
||
++data;
|
||
++sent;
|
||
}
|
||
|
||
}
|
||
|
||
while ((timeout == SystemWaitForever) || (endMs > SystemGetMs())) {
|
||
if (usart_flag_get(env->uart, USART_TDC_FLAG))
|
||
break;
|
||
}
|
||
|
||
return sent;
|
||
}
|
||
|
||
|
||
uint16_t vSerialPortBlindTransmit(tSerialPortArtery *env, uint8_t *data, uint16_t size, uint32_t timeout) {
|
||
|
||
uint16_t sent = 0;
|
||
uint32_t endMs = SystemGetMs() + timeout;
|
||
|
||
|
||
while ((timeout == SystemWaitForever) || (endMs > SystemGetMs())) {
|
||
if (usart_flag_get(env->uart, USART_TDC_FLAG))
|
||
break;
|
||
else {
|
||
asm("nop");
|
||
}
|
||
}
|
||
|
||
// dma_channel_enable(env->txDmaChannel, FALSE);
|
||
|
||
dma_channel_enable(env->txDmaChannel, FALSE);
|
||
env->dma_tx_init_struct.buffer_size = size;
|
||
env->dma_tx_init_struct.memory_base_addr = (uint32_t) data;
|
||
dma_init(env->txDmaChannel, &env->dma_tx_init_struct);
|
||
dma_channel_enable(env->txDmaChannel, TRUE);
|
||
|
||
// uint8_t res;
|
||
// int32_t s = SystemGetMs();
|
||
// sent = (osMessageQueueGet(env->txAccessQueue, &res, 0, timeout) == osOK) ? size : 0;
|
||
// int32_t s1 = SystemGetMs();
|
||
// int32_t s3 = s1 - s;
|
||
|
||
|
||
return sent;
|
||
}
|
||
|
||
static SerialPortIOTransaction vSerialPortTransmitterGet(tSerialPortArtery *env) {
|
||
|
||
#ifdef UART_DMA_SEND
|
||
if (env->txDmaChannel)
|
||
return (SerialPortIOTransaction) vSerialPortTransmitOverDma;
|
||
else
|
||
return (SerialPortIOTransaction) vSerialPortTransmitOverCore;
|
||
#else
|
||
return (SerialPortIOTransaction) vSerialPortTransmitOverCore;
|
||
#endif
|
||
}
|
||
|
||
tSerialPortIO vSerialPortGetIo(tSerialPortArtery *env) {
|
||
tSerialPortIO io = {
|
||
.env = env,
|
||
.receive = (SerialPortIOTransaction) vSerialPortReceive,
|
||
.transmit = vSerialPortTransmitterGet(env)
|
||
};
|
||
return io;
|
||
}
|
||
|
||
tSerialPortIO vSerialPortGetSnifferIo(tSerialPortArtery *env) {
|
||
tSerialPortIO io = {
|
||
.env = env,
|
||
.receive = (SerialPortIOTransaction) vSerialPortReceiveSniffer,
|
||
.transmit = vSerialPortTransmitterGet(env)
|
||
};
|
||
return io;
|
||
}
|
||
|
||
tSerialPortIO SerialPort_GetSnifferSecondIo(tSerialPortArtery *env) {
|
||
tSerialPortIO io = {
|
||
.env = env,
|
||
.receive = (SerialPortIOTransaction) vSerialPortReceiveSnifferSecond,
|
||
.transmit = vSerialPortTransmitterGet(env)
|
||
};
|
||
return io;
|
||
} |