572 lines
23 KiB
ArmAsm
572 lines
23 KiB
ArmAsm
/**
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******************************************************************************
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* @file startup_at32f435_437.s
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* @version v2.0.4
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* @date 2021-12-31
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* @brief at32f435_437 devices vector table for gcc toolchain.
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* this module performs:
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* - set the initial sp
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* - set the initial pc == reset_handler,
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* - set the vector table entries with the exceptions isr address
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* - configure the clock system and the external sram to
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* be used as data memory (optional, to be enabled by user)
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* - branches to main in the c library (which eventually
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* calls main()).
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* after reset the cortex-m4 processor is in thread mode,
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* priority is privileged, and the stack is set to main.
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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bl SystemInit
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/* Call static constructors */
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bl __libc_init_array
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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* @param None
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* @retval None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WWDT_IRQHandler /* Window Watchdog Timer */
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.word PVM_IRQHandler /* PVM through EXINT Line detect */
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.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXINT line */
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.word ERTC_WKUP_IRQHandler /* ERTC Wakeup through the EXINT line */
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.word FLASH_IRQHandler /* Flash */
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.word CRM_IRQHandler /* CRM */
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.word EXINT0_IRQHandler /* EXINT Line 0 */
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.word EXINT1_IRQHandler /* EXINT Line 1 */
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.word EXINT2_IRQHandler /* EXINT Line 2 */
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.word EXINT3_IRQHandler /* EXINT Line 3 */
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.word EXINT4_IRQHandler /* EXINT Line 4 */
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.word EDMA_Stream1_IRQHandler /* EDMA Stream 1 */
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.word EDMA_Stream2_IRQHandler /* EDMA Stream 2 */
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.word EDMA_Stream3_IRQHandler /* EDMA Stream 3 */
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.word EDMA_Stream4_IRQHandler /* EDMA Stream 4 */
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.word EDMA_Stream5_IRQHandler /* EDMA Stream 5 */
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.word EDMA_Stream6_IRQHandler /* EDMA Stream 6 */
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.word EDMA_Stream7_IRQHandler /* EDMA Stream 7 */
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.word ADC1_2_3_IRQHandler /* ADC1 & ADC2 & ADC3 */
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.word CAN1_TX_IRQHandler /* CAN1 TX */
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.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SE_IRQHandler /* CAN1 SE */
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.word EXINT9_5_IRQHandler /* EXINT Line [9:5] */
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.word TMR1_BRK_TMR9_IRQHandler /* TMR1 Brake and TMR9 */
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.word TMR1_OVF_TMR10_IRQHandler /* TMR1 Overflow and TMR10 */
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.word TMR1_TRG_HALL_TMR11_IRQHandler /* TMR1 Trigger and hall and TMR11 */
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.word TMR1_CH_IRQHandler /* TMR1 Channel */
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.word TMR2_GLOBAL_IRQHandler /* TMR2 */
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.word TMR3_GLOBAL_IRQHandler /* TMR3 */
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.word TMR4_GLOBAL_IRQHandler /* TMR4 */
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.word I2C1_EVT_IRQHandler /* I2C1 Event */
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.word I2C1_ERR_IRQHandler /* I2C1 Error */
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.word I2C2_EVT_IRQHandler /* I2C2 Event */
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.word I2C2_ERR_IRQHandler /* I2C2 Error */
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.word SPI1_IRQHandler /* SPI1 */
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.word SPI2_I2S2EXT_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word USART3_IRQHandler /* USART3 */
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.word EXINT15_10_IRQHandler /* EXINT Line [15:10] */
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.word ERTCAlarm_IRQHandler /* RTC Alarm through EXINT Line */
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.word OTGFS1_WKUP_IRQHandler /* OTGFS1 Wakeup from suspend */
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.word TMR8_BRK_TMR12_IRQHandler /* TMR8 Brake and TMR12 */
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.word TMR8_OVF_TMR13_IRQHandler /* TMR8 Overflow and TMR13 */
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.word TMR8_TRG_HALL_TMR14_IRQHandler /* TMR8 Trigger and hall and TMR14 */
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.word TMR8_CH_IRQHandler /* TMR8 Channel */
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.word EDMA_Stream8_IRQHandler /* EDMA Stream 8 */
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.word XMC_IRQHandler /* XMC */
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.word SDIO1_IRQHandler /* SDIO1 */
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.word TMR5_GLOBAL_IRQHandler /* TMR5 */
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.word SPI3_I2S3EXT_IRQHandler /* SPI3 */
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.word UART4_IRQHandler /* UART4 */
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.word UART5_IRQHandler /* UART5 */
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.word TMR6_DAC_GLOBAL_IRQHandler /* TMR6 & DAC */
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.word TMR7_GLOBAL_IRQHandler /* TMR7 */
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.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
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.word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
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.word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
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.word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
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.word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
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.word EMAC_IRQHandler /* EMAC */
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.word EMAC_WKUP_IRQHandler /* EMAC Wakeup */
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.word CAN2_TX_IRQHandler /* CAN2 TX */
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.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
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.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
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.word CAN2_SE_IRQHandler /* CAN2 SE */
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.word OTGFS1_IRQHandler /* OTGFS1 */
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.word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
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.word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
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.word 0 /* Reserved */
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.word USART6_IRQHandler /* USART6 */
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.word I2C3_EVT_IRQHandler /* I2C3 Event */
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.word I2C3_ERR_IRQHandler /* I2C3 Error */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word OTGFS2_WKUP_IRQHandler /* OTGFS2 Wakeup from suspend */
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.word OTGFS2_IRQHandler /* OTGFS2 */
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.word DVP_IRQHandler /* DVP */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word FPU_IRQHandler /* FPU */
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.word UART7_IRQHandler /* UART7 */
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.word UART8_IRQHandler /* UART8 */
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.word SPI4_IRQHandler /* SPI4 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word QSPI2_IRQHandler /* QSPI2 */
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.word QSPI1_IRQHandler /* QSPI1 */
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.word 0 /* Reserved */
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.word DMAMUX_IRQHandler /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word SDIO2_IRQHandler /* SDIO2 */
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.word ACC_IRQHandler /* ACC */
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.word TMR20_BRK_IRQHandler /* TMR20 Brake */
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.word TMR20_OVF_IRQHandler /* TMR20 Overflow */
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.word TMR20_TRG_HALL_IRQHandler /* TMR20 Trigger and hall */
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.word TMR20_CH_IRQHandler /* TMR20 Channel */
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.word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
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.word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
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.word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
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.word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
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.word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
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.word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
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.word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak WWDT_IRQHandler
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.thumb_set WWDT_IRQHandler,Default_Handler
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.weak PVM_IRQHandler
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.thumb_set PVM_IRQHandler,Default_Handler
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.weak TAMP_STAMP_IRQHandler
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.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
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.weak ERTC_WKUP_IRQHandler
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.thumb_set ERTC_WKUP_IRQHandler,Default_Handler
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.weak FLASH_IRQHandler
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.thumb_set FLASH_IRQHandler,Default_Handler
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.weak CRM_IRQHandler
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.thumb_set CRM_IRQHandler,Default_Handler
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.weak EXINT0_IRQHandler
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.thumb_set EXINT0_IRQHandler,Default_Handler
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.weak EXINT1_IRQHandler
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.thumb_set EXINT1_IRQHandler,Default_Handler
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.weak EXINT2_IRQHandler
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.thumb_set EXINT2_IRQHandler,Default_Handler
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.weak EXINT3_IRQHandler
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.thumb_set EXINT3_IRQHandler,Default_Handler
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.weak EXINT4_IRQHandler
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.thumb_set EXINT4_IRQHandler,Default_Handler
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.weak EDMA_Stream1_IRQHandler
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.thumb_set EDMA_Stream1_IRQHandler,Default_Handler
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.weak EDMA_Stream2_IRQHandler
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.thumb_set EDMA_Stream2_IRQHandler,Default_Handler
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.weak EDMA_Stream3_IRQHandler
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.thumb_set EDMA_Stream3_IRQHandler,Default_Handler
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.weak EDMA_Stream4_IRQHandler
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.thumb_set EDMA_Stream4_IRQHandler,Default_Handler
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.weak EDMA_Stream5_IRQHandler
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.thumb_set EDMA_Stream5_IRQHandler,Default_Handler
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.weak EDMA_Stream6_IRQHandler
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.thumb_set EDMA_Stream6_IRQHandler,Default_Handler
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.weak EDMA_Stream7_IRQHandler
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.thumb_set EDMA_Stream7_IRQHandler,Default_Handler
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.weak ADC1_2_3_IRQHandler
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.thumb_set ADC1_2_3_IRQHandler,Default_Handler
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler,Default_Handler
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.weak CAN1_RX0_IRQHandler
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.thumb_set CAN1_RX0_IRQHandler,Default_Handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler,Default_Handler
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.weak CAN1_SE_IRQHandler
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.thumb_set CAN1_SE_IRQHandler,Default_Handler
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.weak EXINT9_5_IRQHandler
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.thumb_set EXINT9_5_IRQHandler,Default_Handler
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.weak TMR1_BRK_TMR9_IRQHandler
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.thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
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.weak TMR1_OVF_TMR10_IRQHandler
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.thumb_set TMR1_OVF_TMR10_IRQHandler,Default_Handler
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.weak TMR1_TRG_HALL_TMR11_IRQHandler
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.thumb_set TMR1_TRG_HALL_TMR11_IRQHandler,Default_Handler
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.weak TMR1_CH_IRQHandler
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.thumb_set TMR1_CH_IRQHandler,Default_Handler
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.weak TMR2_GLOBAL_IRQHandler
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.thumb_set TMR2_GLOBAL_IRQHandler,Default_Handler
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.weak TMR3_GLOBAL_IRQHandler
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.thumb_set TMR3_GLOBAL_IRQHandler,Default_Handler
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.weak TMR4_GLOBAL_IRQHandler
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.thumb_set TMR4_GLOBAL_IRQHandler,Default_Handler
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.weak I2C1_EVT_IRQHandler
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.thumb_set I2C1_EVT_IRQHandler,Default_Handler
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.weak I2C1_ERR_IRQHandler
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.thumb_set I2C1_ERR_IRQHandler,Default_Handler
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.weak I2C2_EVT_IRQHandler
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.thumb_set I2C2_EVT_IRQHandler,Default_Handler
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.weak I2C2_ERR_IRQHandler
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.thumb_set I2C2_ERR_IRQHandler,Default_Handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler,Default_Handler
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.weak SPI2_I2S2EXT_IRQHandler
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.thumb_set SPI2_I2S2EXT_IRQHandler,Default_Handler
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.weak USART1_IRQHandler
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.thumb_set USART1_IRQHandler,Default_Handler
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler,Default_Handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler,Default_Handler
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.weak EXINT15_10_IRQHandler
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.thumb_set EXINT15_10_IRQHandler,Default_Handler
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.weak ERTCAlarm_IRQHandler
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.thumb_set ERTCAlarm_IRQHandler,Default_Handler
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.weak OTGFS1_WKUP_IRQHandler
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.thumb_set OTGFS1_WKUP_IRQHandler,Default_Handler
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.weak TMR8_BRK_TMR12_IRQHandler
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.thumb_set TMR8_BRK_TMR12_IRQHandler,Default_Handler
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.weak TMR8_OVF_TMR13_IRQHandler
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.thumb_set TMR8_OVF_TMR13_IRQHandler,Default_Handler
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.weak TMR8_TRG_HALL_TMR14_IRQHandler
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.thumb_set TMR8_TRG_HALL_TMR14_IRQHandler,Default_Handler
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.weak TMR8_CH_IRQHandler
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.thumb_set TMR8_CH_IRQHandler,Default_Handler
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.weak EDMA_Stream8_IRQHandler
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.thumb_set EDMA_Stream8_IRQHandler,Default_Handler
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.weak XMC_IRQHandler
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.thumb_set XMC_IRQHandler,Default_Handler
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.weak SDIO1_IRQHandler
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.thumb_set SDIO1_IRQHandler,Default_Handler
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.weak TMR5_GLOBAL_IRQHandler
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.thumb_set TMR5_GLOBAL_IRQHandler,Default_Handler
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.weak SPI3_I2S3EXT_IRQHandler
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.thumb_set SPI3_I2S3EXT_IRQHandler,Default_Handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler,Default_Handler
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.weak UART5_IRQHandler
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.thumb_set UART5_IRQHandler,Default_Handler
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.weak TMR6_DAC_GLOBAL_IRQHandler
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.thumb_set TMR6_DAC_GLOBAL_IRQHandler,Default_Handler
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.weak TMR7_GLOBAL_IRQHandler
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.thumb_set TMR7_GLOBAL_IRQHandler,Default_Handler
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.weak DMA1_Channel1_IRQHandler
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.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
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.weak DMA1_Channel2_IRQHandler
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.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
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.weak DMA1_Channel3_IRQHandler
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.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
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.weak DMA1_Channel4_IRQHandler
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.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
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.weak DMA1_Channel5_IRQHandler
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.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
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.weak EMAC_IRQHandler
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.thumb_set EMAC_IRQHandler,Default_Handler
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.weak EMAC_WKUP_IRQHandler
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.thumb_set EMAC_WKUP_IRQHandler,Default_Handler
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.weak CAN2_TX_IRQHandler
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.thumb_set CAN2_TX_IRQHandler,Default_Handler
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.weak CAN2_RX0_IRQHandler
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.thumb_set CAN2_RX0_IRQHandler ,Default_Handler
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.weak CAN2_RX1_IRQHandler
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.thumb_set CAN2_RX1_IRQHandler ,Default_Handler
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.weak CAN2_SE_IRQHandler
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.thumb_set CAN2_SE_IRQHandler,Default_Handler
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.weak OTGFS1_IRQHandler
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.thumb_set OTGFS1_IRQHandler,Default_Handler
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.weak DMA1_Channel6_IRQHandler
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.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
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.weak DMA1_Channel7_IRQHandler
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.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
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.weak USART6_IRQHandler
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.thumb_set USART6_IRQHandler,Default_Handler
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.weak I2C3_EVT_IRQHandler
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.thumb_set I2C3_EVT_IRQHandler,Default_Handler
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.weak I2C3_ERR_IRQHandler
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.thumb_set I2C3_ERR_IRQHandler,Default_Handler
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.weak OTGFS2_WKUP_IRQHandler
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.thumb_set OTGFS2_WKUP_IRQHandler,Default_Handler
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.weak OTGFS2_IRQHandler
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.thumb_set OTGFS2_IRQHandler,Default_Handler
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.weak DVP_IRQHandler
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.thumb_set DVP_IRQHandler,Default_Handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Default_Handler
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.weak UART7_IRQHandler
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.thumb_set UART7_IRQHandler,Default_Handler
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.weak UART8_IRQHandler
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.thumb_set UART8_IRQHandler,Default_Handler
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.weak SPI4_IRQHandler
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.thumb_set SPI4_IRQHandler,Default_Handler
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.weak QSPI2_IRQHandler
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.thumb_set QSPI2_IRQHandler,Default_Handler
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.weak QSPI1_IRQHandler
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.thumb_set QSPI1_IRQHandler,Default_Handler
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.weak DMAMUX_IRQHandler
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.thumb_set DMAMUX_IRQHandler ,Default_Handler
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.weak SDIO2_IRQHandler
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.thumb_set SDIO2_IRQHandler ,Default_Handler
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.weak ACC_IRQHandler
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.thumb_set ACC_IRQHandler,Default_Handler
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.weak TMR20_BRK_IRQHandler
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.thumb_set TMR20_BRK_IRQHandler,Default_Handler
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.weak TMR20_OVF_IRQHandler
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.thumb_set TMR20_OVF_IRQHandler,Default_Handler
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.weak TMR20_TRG_HALL_IRQHandler
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.thumb_set TMR20_TRG_HALL_IRQHandler,Default_Handler
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.weak TMR20_CH_IRQHandler
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.thumb_set TMR20_CH_IRQHandler,Default_Handler
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.weak DMA2_Channel1_IRQHandler
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.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
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.weak DMA2_Channel2_IRQHandler
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.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
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.weak DMA2_Channel3_IRQHandler
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.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
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.weak DMA2_Channel4_IRQHandler
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.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
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.weak DMA2_Channel5_IRQHandler
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.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
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.weak DMA2_Channel6_IRQHandler
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.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
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.weak DMA2_Channel7_IRQHandler
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.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
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