167 lines
4.4 KiB
C
167 lines
4.4 KiB
C
//
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// Created by cfif on 07.09.22.
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//
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#include <SystemDelayInterface.h>
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#include "AdcArtery.h"
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tAdcArtery ADC_Initial(
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adc_type *ADCx,
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adc_channel_select_type ADC_Channel,
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int32_t offset,
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double mux,
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double div
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) {
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adc_common_config_type adc_common_struct;
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adc_base_config_type adc_base_struct;
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// nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
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adc_common_default_para_init(&adc_common_struct);
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/* config combine mode */
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adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
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/* config division,adcclk is division by hclk */
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adc_common_struct.div = ADC_HCLK_DIV_17;
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/* config common dma mode,it's not useful in independent mode */
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adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
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/* config common dma request repeat */
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adc_common_struct.common_dma_request_repeat_state = FALSE;
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/* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
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adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_20CYCLES;
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/* config inner temperature sensor and vintrv */
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adc_common_struct.tempervintrv_state = FALSE;
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/* config voltage battery */
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adc_common_struct.vbat_state = FALSE;
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adc_common_config(&adc_common_struct);
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adc_base_default_para_init(&adc_base_struct);
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adc_base_struct.sequence_mode = TRUE;
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adc_base_struct.repeat_mode = TRUE;
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adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
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adc_base_struct.ordinary_channel_length = 1;
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adc_base_config(ADCx, &adc_base_struct);
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adc_resolution_set(ADCx, ADC_RESOLUTION_12B);
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/* config ordinary channel */
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adc_ordinary_channel_set(ADCx, ADC_Channel, 1, ADC_SAMPLETIME_640_5);
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/* config ordinary trigger source and trigger edge */
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adc_ordinary_conversion_trigger_set(ADCx, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
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/* config dma mode,it's not useful when common dma mode is use */
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adc_dma_mode_enable(ADCx, FALSE);
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/* config dma request repeat,it's not useful when common dma mode is use */
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adc_dma_request_repeat_enable(ADCx, FALSE);
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/* each ordinary channel conversion set occe flag */
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adc_occe_each_conversion_enable(ADCx, TRUE);
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/* enable adc overflow interrupt */
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// adc_interrupt_enable(ADCx, ADC_OCCO_INT, TRUE);
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/* adc enable */
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adc_enable(ADCx, TRUE);
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while (adc_flag_get(ADCx, ADC_RDY_FLAG) == RESET);
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/* adc calibration */
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adc_calibration_init(ADCx);
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while (adc_calibration_init_status_get(ADCx));
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adc_calibration_start(ADCx);
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while (adc_calibration_status_get(ADCx));
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#ifdef ACCESS_ADC
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tAdcArtery adc = {
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.ADCx = ADCx,
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.ADC_Channel = ADC_Channel,
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.offset = offset,
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.div = div,
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.mux = mux,
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.access = osMutexNew(NULL)
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};
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#else
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tAdcArtery adc = {
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.ADCx = ADCx,
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.ADC_Channel = ADC_Channel,
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.offset = offset,
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.div = div,
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.mux = mux
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};
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#endif
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return adc;
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}
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static uint16_t vAdcGet(tAdcArtery *env, uint32_t timeout) {
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#ifdef ACCESS_ADC
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if (osMutexAcquire(env->access, 1200) == osOK) {
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uint32_t endMs = SystemGetMs() + timeout;
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uint16_t data;
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adc_ordinary_software_trigger_enable(env->ADCx, TRUE);
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while (adc_flag_get(env->ADCx, ADC_OCCE_FLAG) == RESET) {
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if (SystemGetMs() > endMs) {
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//todo error
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osMutexRelease(env->access);
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return 0;
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}
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}
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data = adc_ordinary_conversion_data_get(env->ADCx);
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adc_flag_clear(env->ADCx, ADC_OCCO_FLAG);
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int64_t projected = (int64_t) ((double )(data + env->offset) * env->mux / env->div);
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osMutexRelease(env->access);
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return projected;
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} else {
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return 0;
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}
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#else
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uint32_t endMs = SystemGetMs() + timeout;
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uint16_t data;
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adc_ordinary_software_trigger_enable(env->ADCx, TRUE);
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while (adc_flag_get(env->ADCx, ADC_OCCE_FLAG) == RESET) {
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if (SystemGetMs() > endMs) {
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//todo error
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return 0;
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}
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}
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data = adc_ordinary_conversion_data_get(env->ADCx);
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adc_flag_clear(env->ADCx, ADC_OCCO_FLAG);
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int64_t projected = ((data + env->offset) * env->mux / env->div);
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return projected;
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#endif
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}
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tAdcIO vAdcGetIo(tAdcArtery *env) {
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tAdcIO io = {
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.env = env,
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.get = (AdcIOTransaction) vAdcGet,
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};
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return io;
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} |