Перенос на новую организацию GONEC
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/**
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**************************************************************************
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* @file i2c_application.h
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* @version v2.0.4
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* @date 2021-12-31
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* @brief i2c application libray header file
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/*!< define to prevent recursive inclusion -------------------------------------*/
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#ifndef __I2C_APPLICATION_H
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#define __I2C_APPLICATION_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* includes ------------------------------------------------------------------*/
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#include "at32f435_437.h"
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/** @addtogroup AT32F435_437_middlewares_i2c_application_library
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* @{
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*/
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/** @defgroup I2C_library_event_check_flag
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* @{
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*/
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#define I2C_EVENT_CHECK_NONE ((uint32_t)0x00000000) /*!< check flag none */
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#define I2C_EVENT_CHECK_ACKFAIL ((uint32_t)0x00000001) /*!< check flag ackfail */
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#define I2C_EVENT_CHECK_STOP ((uint32_t)0x00000002) /*!< check flag stop */
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/**
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* @}
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*/
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/** @defgroup I2C_library_transmission_mode
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* @{
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*/
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typedef enum
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{
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I2C_INT_MA_TX = 0,
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I2C_INT_MA_RX,
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I2C_INT_SLA_TX,
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I2C_INT_SLA_RX,
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I2C_DMA_MA_TX,
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I2C_DMA_MA_RX,
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I2C_DMA_SLA_TX,
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I2C_DMA_SLA_RX,
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} i2c_mode_type;
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/**
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* @}
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*/
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/** @defgroup I2C_library_status_code
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* @{
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*/
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typedef enum
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{
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I2C_OK = 0, /*!< no error */
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I2C_ERR_STEP_1, /*!< step 1 error */
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I2C_ERR_STEP_2, /*!< step 2 error */
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I2C_ERR_STEP_3, /*!< step 3 error */
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I2C_ERR_STEP_4, /*!< step 4 error */
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I2C_ERR_STEP_5, /*!< step 5 error */
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I2C_ERR_STEP_6, /*!< step 6 error */
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I2C_ERR_STEP_7, /*!< step 7 error */
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I2C_ERR_STEP_8, /*!< step 8 error */
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I2C_ERR_STEP_9, /*!< step 9 error */
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I2C_ERR_STEP_10, /*!< step 10 error */
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I2C_ERR_STEP_11, /*!< step 11 error */
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I2C_ERR_STEP_12, /*!< step 12 error */
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I2C_ERR_TCRLD, /*!< tcrld error */
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I2C_ERR_TDC, /*!< tdc error */
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I2C_ERR_ADDR, /*!< addr error */
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I2C_ERR_STOP, /*!< stop error */
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I2C_ERR_ACKFAIL, /*!< ackfail error */
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I2C_ERR_TIMEOUT, /*!< timeout error */
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I2C_ERR_INTERRUPT, /*!< interrupt error */
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} i2c_status_type;
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/**
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* @}
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*/
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/** @defgroup I2C_library_handler
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* @{
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*/
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typedef struct
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{
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i2c_type *i2cx; /*!< i2c registers base address */
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uint8_t *pbuff; /*!< pointer to i2c transfer buffer */
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__IO uint16_t psize; /*!< i2c transfer size */
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__IO uint16_t pcount; /*!< i2c transfer counter */
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__IO uint32_t mode; /*!< i2c communication mode */
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__IO uint32_t status; /*!< i2c communication status */
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__IO i2c_status_type error_code; /*!< i2c error code */
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dma_channel_type *dma_tx_channel; /*!< dma transmit channel */
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dma_channel_type *dma_rx_channel; /*!< dma receive channel */
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dma_init_type dma_init_struct; /*!< dma init parameters */
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} i2c_handle_type;
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/**
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* @}
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*/
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/** @defgroup I2C_library_exported_functions
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* @{
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*/
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void i2c_config (i2c_handle_type* hi2c);
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void i2c_lowlevel_init (i2c_handle_type* hi2c);
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i2c_status_type i2c_wait_end (i2c_handle_type* hi2c, uint32_t timeout);
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i2c_status_type i2c_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_master_transmit_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_master_receive_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_transmit_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_receive_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_master_transmit_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_master_receive_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_transmit_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_slave_receive_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_smbus_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_smbus_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_smbus_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_smbus_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_write (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_write_int (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_write_dma (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_read (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_read_int (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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i2c_status_type i2c_memory_read_dma (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
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void i2c_evt_irq_handler (i2c_handle_type* hi2c);
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void i2c_err_irq_handler (i2c_handle_type* hi2c);
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void i2c_dma_tx_irq_handler (i2c_handle_type* hi2c);
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void i2c_dma_rx_irq_handler (i2c_handle_type* hi2c);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,208 @@
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//
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// Created by cfif on 11.02.23.
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//
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#include "i2c_application.h"
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#include "delay_sec.h"
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#include "stdbool.h"
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/** @addtogroup AT32F437_periph_examples
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* @{
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*/
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/** @addtogroup 437_I2C_communication_smbus I2C_communication_smbus
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* @{
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*/
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#define I2C_TIMEOUT 0xFFFF
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//#define I2Cx_CLKCTRL 0xB170FFFF //10K
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//#define I2Cx_CLKCTRL 0xC0E06969 //50K
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#define I2Cx_CLKCTRL 0x80504C4E //100K
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//#define I2Cx_CLKCTRL 0x30F03C6B //200K
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//0x6A
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#define I2Cx_ADDRESS (0x60 << 1)
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#define I2Cx_PORT I2C3
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#define I2Cx_CLK CRM_I2C3_PERIPH_CLOCK
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#define I2Cx_DMA DMA1
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#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
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#define I2Cx_SCL_GPIO_CLK CRM_GPIOF_PERIPH_CLOCK
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#define I2Cx_SCL_GPIO_PIN GPIO_PINS_14
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#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE14
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#define I2Cx_SCL_GPIO_PORT GPIOF
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#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
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#define I2Cx_SDA_GPIO_CLK CRM_GPIOF_PERIPH_CLOCK
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#define I2Cx_SDA_GPIO_PIN GPIO_PINS_15
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#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE15
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#define I2Cx_SDA_GPIO_PORT GPIOF
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#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
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i2c_handle_type hi2cx;
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void i2c_lowlevel_init(i2c_handle_type *hi2c) {
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gpio_init_type gpio_init_structure;
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if (hi2c->i2cx == I2Cx_PORT) {
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/* i2c periph clock enable */
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crm_periph_clock_enable(I2Cx_CLK, TRUE);
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crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
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crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
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/* gpio configuration */
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gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
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gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
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/* configure i2c pins: scl */
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gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
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gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
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gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
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gpio_init_structure.gpio_pull = GPIO_PULL_UP;
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gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
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gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
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/* configure i2c pins: sda */
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gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
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gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
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/* config i2c */
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i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL);
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i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
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}
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|
}
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const uint16_t V = 1700;
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uint8_t reg0[2] = {0x0, V & 7};
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uint8_t reg1[2] = {0x1, V >> 3};
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uint8_t reg2[2] = {0x2, 0x1};
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uint8_t reg3[2] = {0x3, 70};
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uint8_t reg_read;
|
||||||
|
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|
bool sendI2c() {
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||||||
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i2c_status_type i2c_status;
|
||||||
|
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||||||
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hi2cx.i2cx = I2Cx_PORT;
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// i2c config
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i2c_config(&hi2cx);
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uint8_t adr = 1;
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// 0 - запись
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// 1 - чтение
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// Reg0 - Напряжение
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if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg0, 2, I2C_TIMEOUT)) != I2C_OK) {
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|
return false;
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|
}
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if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg0, 1, I2C_TIMEOUT)) != I2C_OK) {
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return false;
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}
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if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, ®_read, 1, I2C_TIMEOUT)) != I2C_OK) {
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return false;
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}
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// Reg1 - Напряжение
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if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg1, 2, I2C_TIMEOUT)) != I2C_OK) {
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return false;
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||||||
|
}
|
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|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg1, 1, I2C_TIMEOUT)) != I2C_OK) {
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||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, ®_read, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// Reg3 - Ток
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||||||
|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg3, 2, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg3, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, ®_read, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// Reg2 - Запуск
|
||||||
|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 2, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, ®_read, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// delay_ms(20);
|
||||||
|
|
||||||
|
// Reg2
|
||||||
|
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, ®_read, 1, I2C_TIMEOUT)) != I2C_OK) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int a = 0;
|
||||||
|
// // start the request reception process
|
||||||
|
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
// {
|
||||||
|
// return false;
|
||||||
|
// }
|
||||||
|
//
|
||||||
|
// // start the request reception process
|
||||||
|
// if((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
// {
|
||||||
|
// return false;
|
||||||
|
// }
|
||||||
|
|
||||||
|
// // start the request reception process
|
||||||
|
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 2, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
// {
|
||||||
|
// return false;
|
||||||
|
// }
|
||||||
|
// // start the request reception process
|
||||||
|
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
// {
|
||||||
|
// return false;
|
||||||
|
// }
|
||||||
|
//
|
||||||
|
// // start the request reception process
|
||||||
|
// if((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
// {
|
||||||
|
// return false;
|
||||||
|
// }
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
// start the request reception process
|
||||||
|
if((i2c_status = i2c_smbus_master_transmit(&hi2cx, I2Cx_ADDRESS | 1, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// start the request reception process
|
||||||
|
if((i2c_status = i2c_smbus_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,10 @@
|
||||||
|
//
|
||||||
|
// Created by cfif on 11.02.23.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef GONEC_GSM_I2C_SMBUS_H
|
||||||
|
#define GONEC_GSM_I2C_SMBUS_H
|
||||||
|
|
||||||
|
bool sendI2c();
|
||||||
|
|
||||||
|
#endif //GONEC_GSM_I2C_SMBUS_H
|
||||||
|
|
@ -0,0 +1,10 @@
|
||||||
|
{
|
||||||
|
"cmake": {
|
||||||
|
"inc_dirs": [
|
||||||
|
"./"
|
||||||
|
],
|
||||||
|
"srcs": [
|
||||||
|
"*.c"
|
||||||
|
]
|
||||||
|
}
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue