Перенос на новую организацию GONEC

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cfif 2025-01-24 13:22:32 +03:00
commit a311b041ed
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/**
**************************************************************************
* @file i2c_application.h
* @version v2.0.4
* @date 2021-12-31
* @brief i2c application libray header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/*!< define to prevent recursive inclusion -------------------------------------*/
#ifndef __I2C_APPLICATION_H
#define __I2C_APPLICATION_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f435_437.h"
/** @addtogroup AT32F435_437_middlewares_i2c_application_library
* @{
*/
/** @defgroup I2C_library_event_check_flag
* @{
*/
#define I2C_EVENT_CHECK_NONE ((uint32_t)0x00000000) /*!< check flag none */
#define I2C_EVENT_CHECK_ACKFAIL ((uint32_t)0x00000001) /*!< check flag ackfail */
#define I2C_EVENT_CHECK_STOP ((uint32_t)0x00000002) /*!< check flag stop */
/**
* @}
*/
/** @defgroup I2C_library_transmission_mode
* @{
*/
typedef enum
{
I2C_INT_MA_TX = 0,
I2C_INT_MA_RX,
I2C_INT_SLA_TX,
I2C_INT_SLA_RX,
I2C_DMA_MA_TX,
I2C_DMA_MA_RX,
I2C_DMA_SLA_TX,
I2C_DMA_SLA_RX,
} i2c_mode_type;
/**
* @}
*/
/** @defgroup I2C_library_status_code
* @{
*/
typedef enum
{
I2C_OK = 0, /*!< no error */
I2C_ERR_STEP_1, /*!< step 1 error */
I2C_ERR_STEP_2, /*!< step 2 error */
I2C_ERR_STEP_3, /*!< step 3 error */
I2C_ERR_STEP_4, /*!< step 4 error */
I2C_ERR_STEP_5, /*!< step 5 error */
I2C_ERR_STEP_6, /*!< step 6 error */
I2C_ERR_STEP_7, /*!< step 7 error */
I2C_ERR_STEP_8, /*!< step 8 error */
I2C_ERR_STEP_9, /*!< step 9 error */
I2C_ERR_STEP_10, /*!< step 10 error */
I2C_ERR_STEP_11, /*!< step 11 error */
I2C_ERR_STEP_12, /*!< step 12 error */
I2C_ERR_TCRLD, /*!< tcrld error */
I2C_ERR_TDC, /*!< tdc error */
I2C_ERR_ADDR, /*!< addr error */
I2C_ERR_STOP, /*!< stop error */
I2C_ERR_ACKFAIL, /*!< ackfail error */
I2C_ERR_TIMEOUT, /*!< timeout error */
I2C_ERR_INTERRUPT, /*!< interrupt error */
} i2c_status_type;
/**
* @}
*/
/** @defgroup I2C_library_handler
* @{
*/
typedef struct
{
i2c_type *i2cx; /*!< i2c registers base address */
uint8_t *pbuff; /*!< pointer to i2c transfer buffer */
__IO uint16_t psize; /*!< i2c transfer size */
__IO uint16_t pcount; /*!< i2c transfer counter */
__IO uint32_t mode; /*!< i2c communication mode */
__IO uint32_t status; /*!< i2c communication status */
__IO i2c_status_type error_code; /*!< i2c error code */
dma_channel_type *dma_tx_channel; /*!< dma transmit channel */
dma_channel_type *dma_rx_channel; /*!< dma receive channel */
dma_init_type dma_init_struct; /*!< dma init parameters */
} i2c_handle_type;
/**
* @}
*/
/** @defgroup I2C_library_exported_functions
* @{
*/
void i2c_config (i2c_handle_type* hi2c);
void i2c_lowlevel_init (i2c_handle_type* hi2c);
i2c_status_type i2c_wait_end (i2c_handle_type* hi2c, uint32_t timeout);
i2c_status_type i2c_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_master_transmit_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_master_receive_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_transmit_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_receive_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_master_transmit_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_master_receive_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_transmit_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_slave_receive_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_smbus_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_smbus_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_smbus_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_smbus_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_write (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_write_int (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_write_dma (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_read (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_read_int (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type i2c_memory_read_dma (i2c_handle_type* hi2c, uint16_t address, uint16_t memaddress, uint8_t* pdata, uint16_t size, uint32_t timeout);
void i2c_evt_irq_handler (i2c_handle_type* hi2c);
void i2c_err_irq_handler (i2c_handle_type* hi2c);
void i2c_dma_tx_irq_handler (i2c_handle_type* hi2c);
void i2c_dma_rx_irq_handler (i2c_handle_type* hi2c);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

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//
// Created by cfif on 11.02.23.
//
#include "i2c_application.h"
#include "delay_sec.h"
#include "stdbool.h"
/** @addtogroup AT32F437_periph_examples
* @{
*/
/** @addtogroup 437_I2C_communication_smbus I2C_communication_smbus
* @{
*/
#define I2C_TIMEOUT 0xFFFF
//#define I2Cx_CLKCTRL 0xB170FFFF //10K
//#define I2Cx_CLKCTRL 0xC0E06969 //50K
#define I2Cx_CLKCTRL 0x80504C4E //100K
//#define I2Cx_CLKCTRL 0x30F03C6B //200K
//0x6A
#define I2Cx_ADDRESS (0x60 << 1)
#define I2Cx_PORT I2C3
#define I2Cx_CLK CRM_I2C3_PERIPH_CLOCK
#define I2Cx_DMA DMA1
#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define I2Cx_SCL_GPIO_CLK CRM_GPIOF_PERIPH_CLOCK
#define I2Cx_SCL_GPIO_PIN GPIO_PINS_14
#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE14
#define I2Cx_SCL_GPIO_PORT GPIOF
#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define I2Cx_SDA_GPIO_CLK CRM_GPIOF_PERIPH_CLOCK
#define I2Cx_SDA_GPIO_PIN GPIO_PINS_15
#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE15
#define I2Cx_SDA_GPIO_PORT GPIOF
#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
i2c_handle_type hi2cx;
void i2c_lowlevel_init(i2c_handle_type *hi2c) {
gpio_init_type gpio_init_structure;
if (hi2c->i2cx == I2Cx_PORT) {
/* i2c periph clock enable */
crm_periph_clock_enable(I2Cx_CLK, TRUE);
crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
/* gpio configuration */
gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
/* configure i2c pins: scl */
gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_structure.gpio_pull = GPIO_PULL_UP;
gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
/* configure i2c pins: sda */
gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
/* config i2c */
i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL);
i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
}
}
const uint16_t V = 1700;
uint8_t reg0[2] = {0x0, V & 7};
uint8_t reg1[2] = {0x1, V >> 3};
uint8_t reg2[2] = {0x2, 0x1};
uint8_t reg3[2] = {0x3, 70};
uint8_t reg_read;
bool sendI2c() {
i2c_status_type i2c_status;
hi2cx.i2cx = I2Cx_PORT;
// i2c config
i2c_config(&hi2cx);
uint8_t adr = 1;
// 0 - запись
// 1 - чтение
// Reg0 - Напряжение
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg0, 2, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg0, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, &reg_read, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
// Reg1 - Напряжение
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg1, 2, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg1, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, &reg_read, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
// Reg3 - Ток
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg3, 2, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg3, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, &reg_read, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
// Reg2 - Запуск
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 2, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, &reg_read, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
// delay_ms(20);
// Reg2
if ((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, reg2, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
if ((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, &reg_read, 1, I2C_TIMEOUT)) != I2C_OK) {
return false;
}
int a = 0;
// // start the request reception process
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
// {
// return false;
// }
//
// // start the request reception process
// if((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
// {
// return false;
// }
// // start the request reception process
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 2, I2C_TIMEOUT)) != I2C_OK)
// {
// return false;
// }
// // start the request reception process
// if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS | 0, tx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
// {
// return false;
// }
//
// // start the request reception process
// if((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, 1, I2C_TIMEOUT)) != I2C_OK)
// {
// return false;
// }
/*
// start the request reception process
if((i2c_status = i2c_smbus_master_transmit(&hi2cx, I2Cx_ADDRESS | 1, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
return false;
}
// start the request reception process
if((i2c_status = i2c_smbus_master_receive(&hi2cx, I2Cx_ADDRESS | 1, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
return false;
}
*/
return true;
}

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//
// Created by cfif on 11.02.23.
//
#ifndef GONEC_GSM_I2C_SMBUS_H
#define GONEC_GSM_I2C_SMBUS_H
bool sendI2c();
#endif //GONEC_GSM_I2C_SMBUS_H

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{
"cmake": {
"inc_dirs": [
"./"
],
"srcs": [
"*.c"
]
}
}